[Coco] Fwd: IP packets on my coco

Dave Philipsen dave at davebiz.com
Fri Jun 10 01:56:38 EDT 2016


To be honest I haven't thoroughly researched or used any of the chips 
with the exception of the ESP8266.  And , initially, my only preference 
would be to stay away from the Cirrus chip because it doesn't support 
interrupts.  I'm not sure if you're understanding though that this 
CP2200 chip has a multiplexed mode where, as far as I can tell, the 
maximum amount of I/O space you'll need is two memory locations.  You'll 
need an 8-bit port through which you can read or write data.  That's one 
byte.  Then you'll need another port to exercise the ALE signal.  That's 
another byte.  I assume you're saying that it needs 114 (let's call it 
114 instead of 141 because that's what I'm actually reading in the data 
sheet) bytes of I/O space based upon the fact that it has 114 internal 
registers.  But let's say you need to read or write to register number 
114.  You simply assert the ALE line (also called AS) and put the 
address value (114) out on the 8-bit port.  Then you release the ALE 
line and read or write the data in that register (register 114).  So the 
same 8-bit port that is used to read and write data to the device is 
also used to select the internal register that you want to read or 
write.  No need to have a huge I/O space.

I'm not trying to sway you one way or the other between the rtl or the 
silicon labs.  They're both probably pretty good chips.  It's just that 
you should understand what the capabilities of each are in order to make 
a good decision.  The Silicon Labs part will require a cheap 3.3v 
regulator but the I/O is 5v tolerant so no level shifters would be 
required.  It appears to me that it only requires two bytes of I/O to 
work if you run it in multiplexed mode.  Look at figure 3 on page 7.  
There is an 8-bit data bus which the 6809 CPU supplies. There are RD and 
WR signals which you would multiplex together to be controlled by a R/W 
line which the CPU supplies.  There's an INT line that goes back to the 
CPU.  And there's an ALE or address strobe line which is not a signal 
that would be supplied by the CPU or the cartridge connector.  You could 
use one bit of a simple 8-bit latch to control that line.  Total I/O = 
two bytes.

If someone else sees it differently, correct me if I'm wrong.  But 
that's the way I'm reading the data sheet.

Dave

On 6/10/2016 12:07 AM, RETRO Innovations wrote:
> On 6/9/2016 9:55 PM, Dave Philipsen wrote:
>> I might be a little worried about using a chip that has these kinds 
>> of problems.
> I can vouch that polled mode on this IC is rock solid.  As the app 
> note states, though, IRQ support cannot be trusted.
>
> I did, though, suggest the rtl IC as a suitable alternative, as it 
> does not contain the issue.  I had hoped to bring that IC to the CBM 
> crowd, but the standard had already been decided by virtue of SW 
> support before I arrived on the scene.
>
> I think the rtl IC has some merit above the 2200/01 IC you noted. It 
> requires far less IO space (16-32 versus 141 bytes), though I think it 
> still needs a way to hide more of the registers to better co-exist in 
> a Coco IO space.
>
> esp8266 registers are the easiest to support (1, if you lock the bps 
> rate, 4-8 if you want to put a UART in line.)
>
> Jim
>
>



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