[Coco] Grant Searles SBC

[Bill Nobel]

I thought the same thing Ed, I have tried pulling the FTDI and going straight 9 pin and get the exact same results.  It seems I may have an issue with my max232 chip.  I am waiting for 10 more to arrive in the next day or so to try swapping out that chip.  I have swapped out all the others except that chip.  I currently took Matts advice and put a 1uf cap on the reset, but I am going to try your idea as well, of the 10k & .1uf on the lin as well.

I’ve also had a thought since I am on a breadboard could I have signal bleed between the lines? since the address and data lines are quite close to each other? I am using 22 gauge wire on the board.

Bill Nobel

> On May 6, 2015, at 7:15 PM, Zippster <zippster278 at gmail.com> wrote:
> 
> Well, since your clock is right at E, timing should be right for the 68B50.
> 
> I agree on putting a cap between reset and ground for an analog debounce on the switch.
> You might try 10k & .1uF for values there.
> 
> Considering you are getting some output and the clock is right, I’d really scrutinize that FTDI chip and the connections there.
> Does it work just going 68B50 —> MAX232 —> Terminal?
> 
> - Ed
> 
> 
> 
> 
>> On May 6, 2015, at 6:51 PM, Bill Nobel <b_nobel at hotmail.com> wrote:
>> 
>> BA is goes high and sometime BS is oscillating between High and Low.  I seems the the CPU doesn’t grab the reset vector properly, but I have verified the Eprom byte for byte.
>> 
>> Now it does’t do this all the time most times power up BA/BS are low until I hit Reset. then things go haywire.  I traced each line 4 times now and I am at a loss as to what I have wrong.  2 thing I changed from Grants circuit is that I am using a HD63C09 and a AS7C256 static ram (same one Kip uses) instead.
>> 
>> Sometimes the garbage on the terminal is just a continuous stream non stop, and sometimes bursts in packets.
>> 
>> Bill Nobel
>> 
>>> On May 6, 2015, at 5:32 PM, Matthew Stock <stock at bexkat.com> wrote:
>>> 
>>> Bill,
>>> 
>>> When it's in this state, what do BA and BS look like on rise of Q?  are
>>> they both high?  If not, it's not a halt state but something else.  Only
>>> thing I can think of is to put a 1uF cap between the reset line and ground
>>> to complete the RC circuit and see if that helps.  I suspect the reset
>>> isn't a clean slope and that's annoying the CPU.
>>> 
>>> Matt
>>> 
>>> 
>>> On Wed, May 6, 2015 at 7:16 PM, Bill Nobel <b_nobel at hotmail.com> wrote:
>>> 
>>>> Hi guys.  This is a shout out to the Hardware Experts out there.  I am
>>>> trying to build this unit on a breadboard and am having some issues.  I am
>>>> following the circuit to a tee.  Powering up I get 1.843 mhz on the E & Q
>>>> lines R/W is working.  But sometimes when I hit reset my BA line goes high
>>>> throwing CPU into HALT state even though my HALT is tied High.  Also on the
>>>> terminal window I am getting nothing but garbage @ 115200 baud.  The one
>>>> difference to the circuit I am using a FTDI instead of the 9 pin serial
>>>> plug.  I verified the FTDI by connecting to a old desktop pc using
>>>> Hyperterm so the chip is working.  But on the SBC I get nothing.  I even
>>>> went to the extent of swapping out all the chips and verified by hand the
>>>> Eprom code to see if it Burned properly.
>>>> 
>>>> Any suggestions or help would be appreciated.
>>>> 
>>>> Bill Nobel
>>>> 
>>>> 
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