[Coco] Multi Pack Replacement

Luis Fernández luis46coco at hotmail.com
Tue Feb 24 18:45:28 EST 2015


8 slot MPIhttp://www.coco3.com/community/2010/07/this-is-part-1-of-2-of-an-8-slot-mpi-multi-pak-interface-design-for-my-friends-at-coco3-com-andor-the-maltedmedia-list-members-from-your-friend-johngimechip-com/


> Date: Wed, 25 Feb 2015 10:24:53 +1100
> From: msmcdoug at iinet.net.au
> To: coco at maltedmedia.com
> Subject: Re: [Coco] Multi Pack Replacement
> 
> On 25/02/2015 4:07 AM, Camillus Blockx wrote:
> 
> > May I ask what FPGA you used, And are there any shematics availlable,
> > and verilog/hdl for coco 1/2/3 use?.
> > I need schematics to render my new PCB.
> 
> There was no one FPGA, it ran on a few FPGA eval/dev boards and a couple of 
> proprietary designs for which I do not own the IP. The one thing they had in 
> common was that they were all Altera devices.
> 
> The back end of WD179x was connected to some FLASH/SRAM which contained a 
> _raw_ floppy disk image. It was tested on both NEWDOS/80 and Super Utility 
> on the TRS-80 Model III. I never had the hardware to connect it to a 
> physical floppy drive, but there's no reason why it shouldn't work with one 
> as that was the original intention when I developed it.
> 
> The WD179X VHDL source is available as part of my PACEDEV project 
> repository. Email me for details.
> 
> The IDE controller I used was the OCIDE1 (Opencores) one, which is freely 
> available on the net. It was directly connected to a Compact Flash card on 
> proprietary hardware, so I am unable to give you the schematics. I'm sure 
> there are plenty of reference designs out there you can copy. It ran LDOS 
> with Peter Bartlett's Model I ROM extensions.
> 
> I also used this core successfully with HDBDOS on my FPGA Coco 1 
> implementation on the same hardware platform.
> 
> I also have a back-end interface for it that makes an SD card look like an 
> IDE drive (written by my colleague). This enabled me to use the 
> abovementioned core on the DE1 (same platform as Gary Becker's CocoFPGA) and 
> it worked well, albeit in read-only mode as the interface doesn't yet have a 
> write mode.
> 
> A CF/IDE interface is the easiest to implement but less convenient for the 
> user and a much larger pin (I/O) count than SD card. Frankly I'm surprised 
> that IDE<->SD card cores aren't available (AFAIK) since it seems to me to be 
> a good solution for this type of thing. In any case, either interface is 
> well documented and I don't think you'll have problems finding schematics 
> for them.
> 
> Happy to help out with testing/debug etc if/when you get that far.
> 
> Regards,
> 
> -- 
> |              Mark McDougall                | "Electrical Engineers do it
> |  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"
> 
> -- 
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