[Coco] How does the SCS line / GIME Setting Work?

sales at gimechip.com sales at gimechip.com
Sat Jun 19 10:49:00 EDT 2010


In the CoCo 3, if you set the GIME to Internal SCS*, the Y4 output of the 
74LS138 goes low on $FF4x range and Y6 goes low on the $FF5x range. I agree 
that this was probably done with the intention of possibly having an 
internal FDC chip. Passing the $FF5x out to the program pak slot would still 
allow DISTO's M.E.B. products to function, but I really don't know the 
reason it was done this way.
----- Original Message ----- 
From: "Darren A" <mechacoco at gmail.com>
To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
Sent: Saturday, June 19, 2010 8:06 AM
Subject: Re: [Coco] How does the SCS line / GIME Setting Work?


> On 6/19/10, Brett Gordon wrote:
>> I hope this isn't too silly of a question to ask.  I'm foggy on the 
>> workings
>> of the SCS line and how the SCS setting on the GIME chip effects it.
>>
>> >From what I gathered the SCS line is asserted when the address bus is 
>> >from
>> 0xFF40 and 0xFF5F.   I assuming it's a specialized address line used to
>> "help" the FDC out. I'm assuming a FDC pack could do this itself if it
>> wanted too.  I'm figuring Tandy wanted to make their FDC a bit cheaper, 
>> so
>> added this line to the CoCo's Cart port.  Is there any other *regular* 
>> uses
>> for this line?
>>
>> And exactly what does the GIME's SCS enable do in 0xFF90 ?  I seem to
>> remember playing with this setting once, and my FCD software stopped
>> working.  So if your GIME's SCS's bit in 0XFF90 is off, the SCS will 
>> never
>> be asserted?
>>
>
> --
>
> You are correct.  The SCS line is an Address Decode signal that
> 'normally' indicates an address access from FF40 to FF5F.  This
> originated from a feature of the SAM chip which outputs a unique
> address code for the ranges FF00-FF1F, FF20-FF3F and FF40-FF5F (among
> others).  The first two were used internally for selection of the
> PIAs. The third was considred a spare and thus given the name "Spare
> Chip Select".
>
> The GIME's SCS bit in FF90 will restrict the SCS range to FF50-FF5F
> when off.  Softawre which communicates with the FDC does so through
> addresses in the FF40-FF4F range, so turning off this bit will
> effectively disable the disk controller.
>
> Darren
>
> --
> Coco mailing list
> Coco at maltedmedia.com
> http://five.pairlist.net/mailman/listinfo/coco


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