[Coco] Undefined bits, was:CoCo 3 MMU test for all
jdaggett at gate.net
jdaggett at gate.net
Mon Jan 21 14:38:12 EST 2008
On 21 Jan 2008 at 9:53, Steve Bjork wrote:
> The main reason that the two high bits return different values is
> because those bit are floating on the data bus. On all reads, the data
> bus is in TRI-state and its up the i/o or memory to place its data on
> the bus. If no data is placed then the CPU will read noise. Most of
> the time the noise on the data bus is whatever the data was there from
> the cycle before.
All data to and from the 6809 passes through IC3, 74LS245.
> As you pointed out art, the LDA 0,X and the LDA ,X are different 6809
> instructions with different value for the addressing mode. But this
> does not account to different values for bits 6 and 7. The ,X has a
> binary pattern of %10000100 and 0,X the binary pattern is %0000000.
> Only bit that changes is bit 7 in the addressing mode but its bit 6
> that that changes in the two reading of $7x and $3x.
Not totally accurate. LDA ,X and LDA 0,X are both nonIndirect Index addressing mode.
While the results are essentially the same the instruction LDA 0,X takes one more machine
cycle than LDA ,X. LDA ,X generates a post byte instruction of 1000 0100 and LDA 0,X will
generate a post byte instruction of 0000 0000. The later forces the 6809 to load the value of
the X register into the ALU along with the lower five bits of the post byte instruction. These
are added to calculate the effective address that is placed on the address buss. The LDA ,X
does not do the extra add and is one machine cycle faster.
That is the difference be tween the two instructions. No it should not be the casue for bit six
being read as a logic one.
> I think there is something else (like the micro-code of the 6809)
> creating the noise on the bits.
My first impression is that it is in the way the RSBASIC code does the PEEK command. The
issue comes at location $B752. LDB ,X. Where X is pointing to the MMU register. The issue
stems from the command before at $B750, BSR. The last instructio before the LDB
instruction would be an RTS. The last item pulled from the stack is the PCR low byte which
would be $52 (0101 0010).
Now here is where I t hink everything is happening. SInce $52 is the last item on the data
buss and when the R/W line goes high, IC3 changes direction. The next item on the data
buss is the six lower bits from the MMU register. Therefore the 74LS245 is reading the last
known data on bits six and seven, 01. This gets clocked into the 6809 ACCB with the GIME
> Roger, this is a mute point anyway because they are undefined bits of
> data and should be ignored.
agreed here. Since the standard GIME MMU registers are only 6 bits, any software
accessing these registers should mask out those bits.
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