[Coco] [Color Computer] USB project

[jdaggett at gate.net]

James

FF80 to FF8F is decoded with the following Boolean Eq. using a 12 input and gate 
and 4 invertors.

A15*A14*A13*A12*A11*A10*A9*A8*A7*/A6*/A5*A4

where "*" is and function and "/" is not function


Asynchronous VHDL code is 

--FILE NAME: IO_control.vhdl
--ENTITY NAME: IO_control
--ARCHITECTURE NAME: behavioral
--REVISION: alpha 0.1	7/25/2005
--
--DESCRIPTION: decodes the address range for the 8 IO select pins. 
--                          The user IO peripheral will use the lower four bits of the 16 bit 
--                          address and the appropriate IO select line to map the peripheral 
--                          device. 
--    Circuit uses 11 LUTs. 
--
-- AUTHOR: James Daggett
-- PROJECT: COCO3 in a Chip.  
-- NOTES: Written for synthesis using XST.
-- HISTORY:
--*****************************************************************************
--  to dos:  Since these outputs will ultimately go to an IOB pin the 'OFF' in the IOB 
--  will latch the IO selects on the rising edge of the E clock. Then pass to the 
OBUF.

library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;

entity IO_control is
    Port ( MPU_address : in std_logic_vector(15 downto 4);
           Eclk : in std_logic;
           IO_FF00 : out std_logic;
           IO_FF10 : out std_logic;
           IO_FF20 : out std_logic;
           IO_FF30 : out std_logic;
           IO_FF40 : out std_logic;
           IO_FF50 : out std_logic;
           IO_FF60 : out std_logic;
           IO_FF70 : out std_logic);
end IO_control;

architecture Behavioral of IO_control is

-- signal declarations
signal A15 : std_logic;    
signal A14 : std_logic;
signal A13 : std_logic;
signal A12 : std_logic;
signal A11 : std_logic;
signal A10 : std_logic;
signal A9  : std_logic;
signal A8  : std_logic;
signal A7  : std_logic;
signal A6  : std_logic;
signal A5  : std_logic;
signal A4  : std_logic;			

begin

--signal assignments
A15 <= MPU_address(15);
A14 <= MPU_address(14);
A13 <= MPU_address(13);
A12 <= MPU_address(12);
A11 <= MPU_address(11);
A10 <= MPU_address(10);
A9  <= MPU_address(9);
A8  <= MPU_address(8);
A7  <= MPU_address(7);
A6  <= MPU_address(6);
A5  <= MPU_address(5);
A4  <= MPU_address(4);


IO_FF00 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and (not A6) and (not A5) and (not A4);

IO_FF10 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and (not A6) and (not A5) and A4;

IO_FF20 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and (not A6) and A5 and (not A4);

IO_FF30 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and (not A6) and A5 and A4;

IO_FF40 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and A6 and (not A5) and (not A4);

IO_FF50 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and A6 and (not A5) and A4;

IO_FF60 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and A6 and A5 and (not A4);

IO_FF70 <=  A15 and A14 and A13 and A12 and A11 and A10 and A9 and A8 and 
(not A7) and A6 and A5 and A4;

end Behavioral;

from my Coco 3  on a chip project. Code is synthesizable for Xilinx XST 
synthesizer. Should synthesize and drop into any Xilinx part. In a Spartan2e it only 
takes up 11 LUTs (Lookup Tables), the building blocks of FPGAs.

james

On 30 Jul 2005 at 3:09, James Diffendaffer wrote:

To:             	ColorComputer at yahoogroups.com
From:           	"James Diffendaffer" <jdiffendaffer at yahoo.com>
Date sent:      	Sat, 30 Jul 2005 03:09:44 -0000
Subject:        	Re: [Coco] [Color Computer] USB project
Copies to:      	Send reply to:  	ColorComputer at yahoogroups.com,
	CoCoList for Color Computer Enthusiasts 
<coco at maltedmedia.com>
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> The chip uses a full byte address range just for it's registers.
> (example FF80-FF8F) That's a lot if I don't want it to interfere with
> anything else.