[Coco] FPGA VS Software Emulators

Mark McDougall msmcdoug at iinet.net.au
Tue Jul 25 20:30:55 EDT 2017

On 26/07/2017 9:17 AM, Joel Rees wrote:

> On Tue, Jul 25, 2017 at 4:02 PM, Walter Zambotti
> <zambotti at iinet.net.au> wrote:

>> Ok so my initial thoughts regarding FPGA (as I really know nothing)
>> were hardware simulation should provide an end product that is more
>> efficient and faster than a general CPU/software emulator.

More efficient? What's your definition of efficiency? Power? Number of 
transistors? Physical size? Then yes, an FPGA is way more efficient.

Faster? In the realm of hobbyist tinkering, not even close. :(

> Cyclone® IV EP4CE22F17C6N FPGA
> runs at 50 MHz.
> Altera Cyclone II 2C20 FPGA
> runs at 50 MHz.

"runs at"? If you mean they both have a 50MHz input clock, that has 
little to do with any of the clocks running inside the FPGA. The input 
clock is fed straight into a clock network and then into a few 
(depending on the chip family) PLL's that can synthesize a wide range of 
frequencies in the design. I haven't looked at the source lately, but 
it's likely that neither design actually uses the 50MHz clock itself.


Mark McDougall

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