[Coco] 6309/6809 opcodes with mixed 8/16 bit registers

[Harry Hurst]

> Also there is a quirk in LEAx opdoce in indexed mode with auto increment.
> If you implement
> LEAX, X+ or LEAX, X++ the X register remains unchanged and one or two in
> not added to
> the pointer register. This is true for all four pointer registers. This is
> because how the 6809
> calculated the EA before doing the auto increment. In indexed mode it is
> better to use LEAX
> 2,X instead for a two byte post increment. Also the LEAX and LEAY opcodes
> do affect the Z
> bit in the status register. LEAS and LEAU do not. This keeps backward
> compatibility with the
> 6800 INX, INY, DECX, and DECY opcodes.

Thank you. I'm not sure whether I knew that 20 years ago when I wrote that
part or not, but I just checked, and it looks like my code is doing it
that way. Which makes me wonder if the 6309 has the same quirk. I hope so,
because if it doesn't I'm going to have to make some changes in that
source code. Does it? If not, I will have to make some adjustments for
6309 simulation. I should set up a CoCo with a 6309 in it pretty soon so I
can check some of this myself, I guess. :) I have several 63B09E's but I
haven't tried to replace the 6809 in one of my CoCo3's. My hands aren't as
steady as they once were.  Still, I think they're steadier now, after my
heart attack and subsequent stent installation, than they were a year ago.
:) I may give that a try, or just put one in a CoCo1/2.

>> One thing I've found, that may not be in your book, Darren, is that the
>> supposedly "not allowed" modes [,R+] and [,-R] are actually functional
>> on
>> the 68B09E. They are "not allowed" in every reference I could find, and
>> yet they work
>
> The post increment and predecrement by one of the pointer registers are
> allowed in indexed
> mode but not in indexed indirect mode. Please reread and understand what
> indexed indirect
> mode is all about.

Please go back and read to the end of the paragraph you included here. You
will hopefully see that I do understand what indexed/indirect addressing
is all about. I did not say that [,R+] or [,-R] was a good idea, or useful
in any way.

>> I think most, if not all, assemblers disallow them, for good reason,
>> but if the CPU encounters an instance of this, it will execute it
>> just fine.

Using debug or some other monitor/debugger utility, put the binary $33 $90
in memory, with an appropriate breakpoint set, and then execute it. Look
at the changes in the registers. You should see what I mean then. In a
subsequent reply to Juan Castro I give an example of what I mean:

> Let's say the X register contains $EC00, the PC is at $EB00, and memory
> word at $EC00 is $8000. The instruction at $EB00 is $33 $90 which would
> mean LEAU [,X+] to the 6809. After executing this instruction:
>
> PC: $EB02
> X:  $EC01
> U:  $8000

> This is not useful. LEAU [,X++], on the other hand, which is a valid
> index/indirect form, can be quite useful.

Thanks again for the tip on the LEA quirk.

HH