[Coco] PICs and S-Video
Chris Hawks
chawks at dls.net
Thu Feb 23 21:25:34 EST 2006
---Reply to mail from John Kowalski about [Coco] PICs and S-Video
> At 08:07 AM 23/02/2006 -0600, Chris Hawks wrote:
>> Yeah, that's how it started. But, the 555(6) output is high when the
>>trigger is low (and HSYNC from the Coco3 is a high pulse), so I'll have to
>>invert HSYNC (another chip!) before it's fed to the timer 1. I should
>>be able to de-couple the connection from timer 1 to timer 2 with an RC
>>network.
>
> Using one 555 would most likely require an extra inverter, but with the two
> timers on the 556, the 2nd timer on the chip might be used as a way of
> inverting the signal.
>
> HSYNC in ________--____________________--____________________--______
>
> timer 1 __________---------------_______---------------_______------
>
> timer 2 _________________________--____________________--___________
> (HSYNC out)
>
>
> -Timer 1 would trigger when the HSYNC goes low and Timer 1's output would
> remain high for the duration of the delay period.
>
> -Timer 2 would trigger when the output of Timer 1 goes low and the output
> would be the new delayed HSYNC signal.
Thats' what I thought 'til I found out that the output will ALLWAYS be
high when the input is low. So the output of timer 1 is not what you show,
but:
timer 1 --------__--------------------__--------------------__---------------
---End reply
Christopher R. Hawks
HAWKSoft
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