[Coco] PICs and S-Video

[John Kowalski]

At 08:07 AM 23/02/2006 -0600, Chris Hawks wrote:
>    Yeah, that's how it started. But, the 555(6) output is high when the
>trigger is low (and HSYNC from the Coco3 is a high pulse), so I'll have to
>invert HSYNC (another chip!) before it's fed to the timer 1. I should
>be able to de-couple the connection from timer 1 to timer 2 with an RC
>network.

Using one 555 would most likely require an extra inverter, but with the two
timers on the 556, the 2nd timer on the chip might be used as a way of
inverting the signal.

HSYNC in    ________--____________________--____________________--______

timer 1     __________---------------_______---------------_______------

timer 2     _________________________--____________________--___________
(HSYNC out)


-Timer 1 would trigger when the HSYNC goes low and Timer 1's output would
remain high for the duration of the delay period.

-Timer 2 would trigger when the output of Timer 1 goes low and the output
would be the new delayed HSYNC signal.

                                         John Kowalski (Sock Master)
                                         http://www.axess.com/twilight/sock/