[Coco] Timer interrupt frequency (50Hz vs 60 Hz)

[Juan Castro]

Em qui., 20 de mar. de 2025 às 18:20, Allen Huffman via Coco <
coco at maltedmedia.com> escreveu:

>
> > I just thought of a horrid solution: count how many times a loop ran
> > between two interrupts, and apply some tolerance. Of course, I'd have to
> > set CPU frequency to baseline 0.89 MHz beforehand. Get typical values and
> > apply some tolerance. Do I really need to do that?
>
> That might indeed be the way to go. It would only take a 1/50th of a
> second, if you could time it that fast ;-)


I imagine it'd go like this. I'll take advantage of the TIMER value being
incremented by the existing IRQ:

Let COUNTER = 0
Let A = TIMER_LSB
WHILE TRUE:
    Let B = TIMER_LSB
    If A != B
        Break
WHILE TRUE:
    COUNTER++
    Let A = TIMER_LSB
    If A != B
        Break
Make decision based on COUNTER value -- in an Europe CoCo it'll be roughly
20% greater than in an Americas CoCo.

Hey, the pseudocode above is easily translatable to 6809 ASM. Let me see if
COUNTER is safe to be 16 bits:

dt = max time between two IRQs = 0.02s

How many 6809 cycles are in dt?

Answer = 0.02 * 890,000 = 17,800

Peachy! COUNTER can be the X register, no problem.