[Coco] Video band width and accessing video memory
Alex Evans
varmfskii at gmail.com
Mon Jun 3 08:00:50 EDT 2019
It is more realistic to start off by dividing by 262 (non-interlaced)
or 262.5 (interlaced) for the number of lines in a NTSC frame as all
of your video modes are built around this. The difference in the CoCo
video modes with varying numbers of lines is how many of these don't
show anything. So your per line available bandwidth would be
1788000/59.94/262=113 16-bit words per line (ignoring the minimum
horizontal banking time) with limits of 226, 452, and 904 for 8, 4,
and 2 bits per pixel.
On Sun, Jun 2, 2019 at 10:18 PM Walter Zambotti <zambotti at iinet.net.au> wrote:
>
> Very interesting!
>
> That’s what I expected.
>
> The video hardware must access 2 bytes per cycle (or on one edge of the cycle).
>
> And the video frequency must always be 1788000 regardless of CPU speed.
>
> And if that is the case then the maximum accessible bytes would be double 29800 or 59600.
>
> Now if you divide that figure by:
>
> 320 horizontal pixels of 4 bits (160 bytes) then the max theoretical vertical resolution is 372.
>
> 320 horizontal pixels of 8 bits (320 bytes) then the max theoretical vertical resolution is 186.
>
> And 186 does not match any known CoCo vertical resolution.
>
> So a hidden CoCo 3 graphics modes that allows 256 colors must simply not exist as there is insufficient bandwidth to display 320x200x8bit. As I calculated the max height could only be 186(.25).
>
> Walter
>
> -----Original Message-----
> From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of RETRO Innovations
> Sent: Monday, 3 June 2019 10:53 AM
> To: coco at maltedmedia.com
> Subject: Re: [Coco] Video band width and accessing video memory
>
> On Jun 1, 2019, at 11:40 PM, Walter <zambotti at iinet.net.au> wrote:
> >> I'm just intrigued at what mechanism the video output device is using
> >> to access memory .
> >>
> >>
> >>
> >> The reason is this.
> >>
> >>
> >>
> >> A CoCo's max freq operates at 1788000hz (1.788mz).
> >>
> >>
> >>
> >> So in 1 second there can be 1788000 cycles. So at maximum of 1 cycle
> >> per memory byte access, a total 1788000 bytes can be accessed.
> >>
> >>
> >>
> >> Dividing that into 60 frames per second that would equate to 1788000
> >> / 60 =
> >> 29,800 bytes per
> >> frame can be accessed.
> >>
> >>
> >>
> >> But the video modes for the CoCo support 320x225x4 = 320x225x(1/2) =
> >> 36000 bytes per screen.
> >>
> >>
> >>
> >> So how does the video device access 36000 bytes per screen in 1/60 of
> >> a second when the memory bandwidth will only allow a maximum of
> >> 29,800 bytes per second!
> >>
> >>
> >>
> >> Does the video device read two bytes in one cycle?
> >>
> >>
> >>
> >> Or are my assumptions all wrong?
>
> I can't speak to all of your assumptions, but the GIME does indeed read
> 2 bytes per half cycle
>
> The base CoCo is 128kB, but the memory is really represented by a 256kW array (256kilobits by 16 bit words)
>
> On the each half of the E clock, the GIME reads the low byte of the RAM array while E is low, and holds the upper byte in U13, transferring to the GIME following the low byte.
>
> Not sure if that helps explain things, though, as I thought GIME only handles video memory for half of each cycle.
>
> Jim
>
>
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