[Coco] Some may call this heresy

[Johann Klasek]

On Mon, May 28, 2018 at 11:49:09PM -0700, CoCo Demus wrote:
> I meant it generates a read to DF76 before the write to DF76. I know it
> needs to read from VAR, but VAR is zero page.
> 
> On Mon, May 28, 2018 at 11:48 PM, CoCo Demus <retrocanada76 at gmail.com>
> wrote:
> 
> > It's a problem because when I write to address DF76 it may or not issue a
> > reading before the write. And the 6545 CRTC has an auto-increment feature.
> > So writing to it woul jump(or not) one address each time making it
> > impossible to use.

> >
> > more strangely i found out that STA $DF76 will likely not generate the
> > read but a STA (VAR),X where *VAR = DF76 will certainly do (not always
> > again)

Not clear which address mode is meant. Which one of STA (ZP,X) and STA (ZP),Y ?

It's a typical 6502 behavior in case of STA (ZP),Y the correction cycle
for page crossing does a read on the effective address (possibly on the
wrong address with high byte not yet incremented) before writing to the right
address.

       #    address   R/W description
       --- ----------- --- ------------------------------------------
        1      PC       R  fetch opcode, increment PC
        2      PC       R  fetch pointer address, increment PC
        3    pointer    R  fetch effective address low
        4   pointer+1   R  fetch effective address high,
                           add Y to low byte of effective address
        5   address+Y*  R  read from effective address,
                           fix high byte of effective address
        6   address+Y   W  write to effective address

              * The high byte of the effective address may be invalid
                at this time, i.e. it may be smaller by $100.

Indexed indirect, STA (ZP,X) does not have this behavior:

        #    address   R/W description
       --- ----------- --- ------------------------------------------
        1      PC       R  fetch opcode, increment PC
        2      PC       R  fetch pointer address, increment PC
        3    pointer    R  read from the address, add X to it
        4   pointer+X   R  fetch effective address low
        5  pointer+X+1  R  fetch effective address high
        6    address    W  write to effective address

Maybe it's possible to switch from (ZP),Y to (ZP,X) (with X=0) ...

Or did I missed the point?

JK