[Coco] Generating 6847 syncs.....

Zippster zippster278 at gmail.com
Mon Mar 28 12:12:54 EDT 2016


Also, is your vsync pulse broken up (“serrated”) by hsync to keep it locked?

- Ed


> On Mar 28, 2016, at 9:57 AM, Phill Harvey-Smith <afra at ramoth.org.uk> wrote:
> 
> Hi All,
> 
> I'm working on an 6847 to SCART RGB board for the 6847, I currently have a version for the Dragon / CoCo and for the Acorn Atom.
> 
> The RGB bit is now working correctly, I'm using a group of comparators to break up the oA, oB, CHB and Y into a digital representation and send them to the monitor through a series of emitter followers via a CPLD.
> 
> However the Sync is proving to be more problematic. The 6847 generates the Horizontal sync that I can use however the FS it outputs is effectively a vertical blank rather than a vertical sync. I should be able to generate the required vertical sync from the FS signal however.
> 
> The 6847 Data sheet tells me that : "the low to high transition of the FS signal coincides with the trailing edge of the vertical sync pulse.
> 
> The data sheet also seems to indicate that the FS signal is 32 HS periods in length. So it should just be a matter of waiting for the falling edge of FS, counting an appropriate number of HS pulses, driving VS low for 3 pluses and then high again?
> 
> However when I do this (in my CPLD) I don't get a consistent VS signal and the image "jumps" (moves up and down between frames). This seems to happen more on graphics screens with a lot of movement on e.g. pmode 3/ 4.
> 
> If I just make VS=FS then the image is rock steady but just shifted partly off the bottom of the screen.
> 
> The section of my CPLD code that generates the sync is :
> 
> HS and FS are straight inputs from the 6847.
> 
> reg [7:0] vscount;
> 
> always @(negedge HS)
> begin
>  if(!FS)
>  begin
>    vscount <= vscount + 1;
>  end
>  else
>  begin
>    vscount	<= 8'b0;
>  end
> end
> 
> // There are 32 HS periods in a FS, the vsync should be the last HS
> // periods
> assign vs_period = ((vscount > 28 ) && (vscount < 32)) ? 1'b0 : 1'b1;
> assign vs_out	 = FS | vs_period;
> 
> assign	CSYNCO	= (HS ^ ~vs_out);
> 
> Does anyone have any idea what might be causing this problem ?
> 
> Cheers.
> 
> Phill.
> 
> -- 
> Phill Harvey-Smith, Programmer, Hardware hacker, and general eccentric !
> 
> "You can twist perceptions, but reality won't budge" -- Rush.
> 
> -- 
> Coco mailing list
> Coco at maltedmedia.com
> https://pairlist5.pair.net/mailman/listinfo/coco



More information about the Coco mailing list