[Coco] MPI Updates

[Camillus]

Very nice Jim,

Like I said before can't wait to try one.

Any idea when they become available for the public and at what price ( two board version)

Just need to know how much I have to set aside each month...lol.
Also a quick question, the IDE cables you use, are those the 80 conductor ones? ( 40 signal / 40 SigGnd )
 
I also wanted to ask you if a modification to your project would work.

I was thinking of making smaller boards, with a coco connector on one side and a idc connector on the other.
A smaller board with your logic and 4 or 8 idc (ide) connectors would then be my controller.
This makes build in a lot easier, a small board into coco, of which 4 to 8 idc (ide) cables can go into a case and connect to any device/pack inside. This was my intention all along to build this from the Guninson schematics, but I liked your idea  with the CPLD. I just wanted to know if the wires would have to much strain on the board. Any thoughts about this?

cb

On 1/28/2016 12:29:04 PM, RETRO Innovations <go4retro at go4retro.com> wrote:
On 1/28/2016 4:08 AM, Gene Heskett wrote:
> On Thursday 28 January 2016 01:46:46 RETRO Innovations wrote:
>
>> Camillus, this is for you...
>>
>> Added some code to the Verilog tonight on the MPI, and I now have an 8
>> slot unit :-)
>>
>> http://postimg.org/image/4n51cl2bh/
>>
> Kewl Jim. That is beginning to look like it needs a case. But how to
> arrange it for minimum real estate? I assume you had a plan?
Sheepishly, I must admit that I do not. I got here by accident:

* I chose 80 conductor IDE cables because I knew they could easily
handle the digital traffic without interference, not becausethey had
3 sets of connectors
* I moved the switches and selector to the board daughterboard for
user concenience, not because it would make dasiy chaining easier to
implement
* The bank switch on the PCB was a holdover from an earlier idea on
the design, one I no longer needed because I moved to a larger
CPLD. In fact, it has not been in the VErilog or on the PCB before
last night.
* The main board design is super simple, as it is just a single CPLD
and the passive components
* I honestly felt that the load of both boards on the IDE cable would
kills usage.


Mainly I created the second board because I thought I was getting close
to shipping a unit out to someone for more testing, and I wanted a unit
to stay here.

Thus, I have no idea how to arrange for minimal real estate.

Jim




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