[Coco] MPI writing to $c000

RETRO Innovations go4retro at go4retro.com
Tue Jan 26 01:25:33 EST 2016


On 1/25/2016 10:30 PM, Darren A wrote:
> On Mon, Jan 25, 2016 at 8:47 PM, RETRO Innovations wrote:
>
>
>> The final equations that worked:
>>
>>   * CE was not needed (can be tied low)
>>   * When WE goes low, bring SLENB low, otherwise, SLENB should be HI-Z
>>     (so other carts can take it low)
>>   * OE = CTS
>>   * My WE equation is:  !(q& !r_w & address[15] & address[14] &
>>     !address[13] & write_enable);
>>
>> My equations differ from Darren's, in that I used Q and not E.  The 6809
>> datasheet states that addresses are valid on rising edge of Q and data to
>> write it valid on rising edge of Q.  It seemed prudent to latch the data on
>> the falling edge of Q before E falls, but I can change it to use the E
>> clock instead if I am missing something.
>
>
>
> Using Q would be okay if your SRAM and decoding logic is fast enough.  You
> should verify how much Address Setup Time is needed. The datasheet for the
> 68B09 lists a minimum of only 15ns Valid Address Time before the rising
> edge of Q. Most CoCo peripherals (including the Disk Controller and Serial
> Pak) use only E. This gives plenty of setup time. The datasheet also shows
> 30ns of Write Data Hold Time after the falling edge of E.
>
> - Darren
>
0 ns are needed for address setup and 0ns are needed fro Tdh (data hold 
time)

So, either E or Q looks to work, or Q&E if one wanted to be stay far 
away from the edges.  The IC requires 45nS of address hold time from the 
time WE falls.

At ~2MHz, E and Q cycle in 500nS, or 250nS for high and 250nS for low.  
Being 90 degrees out of phase, that's 125ns for Q&E worst case, which is 
still twice the needed time, if my math holds.

But, to be complete, I'll switch it to E and see what happens.

Jim







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