[Coco] Kip's Single Board Computer

Dave Philipsen dave at davebiz.com
Tue Sep 8 20:37:23 EDT 2015


Just one correction:  Tie D1 and D4 high with 4.7k pull ups and tie all 
the other data lines directly to ground to put 0x12 on the data bus (I 
had previously said D2 and D5 but that is incorrect).

Dave Philipsen


On 9/8/2015 7:23 PM, Dave Philipsen wrote:
> If you just pull up D2 and D5 this causes 0x12 to be present on the 
> data bus at all times.  Initially, when the CPU tries to fetch the 
> reset vector on startup it will see 0x12 as the high byte and the low 
> byte of the reset vector.  It will jump to address 0x1212 and will 
> again read 0x12 on the data bus which is a NOP.  Thereafter, all reads 
> of subsequent addresses (0x1213, 0x1214, etc) will come up with 0x12 
> so the CPU will just step through addresses one at a time at whatever 
> rate the core is clocked at.  If the CPU is clocked at 1 MHz you'll 
> see a 1 MHz waveform on A0, 500 KHz on A1, 250 KHx on A2, etc.
>
> Dave Philipsen
>
>
> On 9/8/2015 7:08 PM, camillus wrote:
>> I have to think a bit over this, so if there is no defined level on 
>> any of the address pins of the cpu and on the data bus the pattern 
>> 0x1212 is hardcoded, then the cpu will eventually read the dataport?
>>
>> Then how is it suppose to know from where to start fetching code. 
>> Without any address from where some code is to execute from the cpu 
>> is going wild, no?
>>
>> Or am I missing something?
>> ( maybe a brain...LOL )
>> cb
>>
>> Sent from Mailbird 
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>> On 9/8/2015 6:46:39 PM, tim lindner <tlindner at macmess.org> wrote:
>> On Tue, Sep 8, 2015 at 4:29 PM, camillus wrote:
>>> Sorry I was not clear in my question, I was referring to the reset 
>>> vector. From where will the cpu start if there is no defined level 
>>> at 0xFFFE and 0xFFFF.
>>>
>>> Is there a hard coded address somewhere?
>>
>> If _all_ reads return 0x12, then the reset vector will be 0x1212. At
>> which point it will read 0x12 (nop).
>>
>>
>> -- 
>> -- 
>> tim lindner
>>
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>
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