[Coco] Cheap alternative to the DE-1?

tim franklinlabs.com tim at franklinlabs.com
Wed Oct 28 15:17:29 EDT 2015


   isn't the hi-res joystick that SB designed a capacitive successive
   approximation form? I seem to remember looking at the design many moons
   ago.

     On October 28, 2015 at 1:43 PM Zippster <zippster278 at gmail.com>
     wrote:
     It is a DAC, the simplest kind.
     <http://www.analog.com/media/en/training-seminars/tutorials/MT-015.p
     df
     <http://www.analog.com/media/en/training-seminars/tutorials/MT-015.p
     df>>
     - Ed
     > On Oct 28, 2015, at 1:39 PM, tim franklinlabs.com
     <tim at franklinlabs.com> wrote:
     >
     > LOL well, I consider the resisters a form of a DAC.
     > As for the USB Blaster, I have two of them. I also have two
     DE-1's. I
     > just saw this and thought it might be an inexpensive alternative
     for
     > those on a budget.
     >
     > On October 28, 2015 at 12:51 PM Dave Philipsen <dave at davebiz.com>
     > wrote:
     > Well, the DE-1 doesn't have a DAC either, just a resistor network.
     > You
     > could probably hack that board though to get more colors if you
     > wanted.
     > Another thing you'd have to consider on this board is that it
     > doesn't
     > have the built in USB Blaster like the DE1. You'd have to buy a
     > blaster
     > on eBay or somewhere. If you are patient you can sometimes find a
     > DE1
     > on eBay that will go for around $90 or so. I even saw one go for
     > around
     > $55 bucks once. My experience finds that they are usually in
     > excellent
     > condition.
     > Dave
     > On 2015-10-28 12:32, tim franklinlabs.com wrote:
     >> Yeah, you're probably right. I found another problem too. I found
     > the
     >> schematic for it and they limit the video to 8 colors. Not DAC to
     >> the
     >> VGA connector. Just logic.
     >> Manual: [1]http://www.dukelanovic.com/A-C8V4%20MANUAL.pdf
     >>
     >> Schematic:
     >>
     >>
     >
     [2]http://d1.amobbs.com/bbs_upload782111/files_44/ourdev_671042EUF7C
     > 8.p
     >> df
     >>
     >> Shorter links too LOL!
     >>
     >> On October 28, 2015 at 12:23 PM Dave Philipsen <dave at davebiz.com>
     >> wrote:
     >> FWIW, I think Gary's project uses north of 9,000 LEs which means
     >> that
     >> even if you can trim it down to fit you won't have a lot of extra
     >> space
     >> for future expansion/additions. Not trying to be negative...I
     hope
     >> you
     >> get it working...would be an interesting project.
     >> Dave Philipsen
     >> On 2015-10-28 07:23, tim franklinlabs.com wrote:
     >>> I ran across this while surfing E-Pray this morning. It looks
     >>> interesting. For those, like me, who are interested in FPGA's,
     >> this
     >>> $70.00 unit seems to have everything needed to port Gary Beckers
     >>> CoCoFPGA to it:
     >>>
     >>>
     >>>
     >>
     >>
     >
     [1]http://www.ebay.com/itm/Altera-Cyclone-NIOS-II-SOPC-FPGA-Developm
     >> ent
     >>>
     >>>
     >>
     >>
     >
     -Learning-Board-EP2C8Q208C8N-LCD1602/272020523309?_trksid=p2054897.c
     >> 100
     >>>
     >>>
     >>
     >>
     >
     204.m3164&_trkparms=aid%3D222007%26algo%3DSIC.MBE%26ao%3D1%26asc%3D2
     >> 014
     >>>
     >>>
     >>
     >>
     >
     0407115239%26meid%3D8d211755ec994eff8913982e805be0c8%26pid%3D100204%
     >> 26r
     >>> k%3D12%26rkt%3D21%26sd%3D261661704545
     >>>
     >>> It uses a smaller FPGA so there may be a limit here. I'm not
     >> sure
     >>> how
     >>> many LE's Gary's code uses.
     >>>
     >>> This board: EP2C8 8,256 LE's
     >>> DE-1: EP2C20 18,752 LE's
     >>>
     >>> Also, there are only 2 PLL's and I'm not sure if both are
     >> connected
     >>> to
     >>> clocks. I bought a small FPGA that had 4 clock inputs with 2
     >> PLL's.
     >>> The
     >>> moron who designed the board connected the clock to one of the
     >> CLK
     >>> pins
     >>> not connected to the PLL's.
     >>>
     >>> This board: 2 PLL's This assumes there are clocks connected to
     >>> both.
     >>> DE-1: 4 PLL's DE-1 uses only 3 (one connected to the
     >>> external clock)
     >>>
     >>> Since Gary posted an "almost" up to date project of his 3.0 FPGA
     >>> code,
     >>> i went ahead and bought one to see if I can port it. It comes
     >> from
     >>> China, so it wont arrive for a while (slow boat from china joke
     >> in
     >>> real
     >>> life). I'll keep everyone posted.
     >>>
     >>> References
     >>>
     >>> 1.
     >>>
     >>
     >>
     >
     http://www.ebay.com/itm/Altera-Cyclone-NIOS-II-SOPC-FPGA-Development
     >>
     >>
     >
     -Learning-Board-EP2C8Q208C8N-LCD1602/272020523309?_trksid=p2054897.c
     >>
     >>
     >
     100204.m3164&_trkparms=aid%3D222007%26algo%3DSIC.MBE%26ao%3D1%26asc%
     >>
     >>
     >
     3D20140407115239%26meid%3D8d211755ec994eff8913982e805be0c8%26pid%3D1
     >> 00204%26rk%3D12%26rkt%3D21%26sd%3D261661704545
     >> --
     >> Coco mailing list
     >> Coco at maltedmedia.com
     >> https://pairlist5.pair.net/mailman/listinfo/coco
     >>
     >> References
     >>
     >> 1. http://www.dukelanovic.com/A-C8V4%20MANUAL.pdf
     >> 2.
     >>
     >
     http://d1.amobbs.com/bbs_upload782111/files_44/ourdev_671042EUF7C8.p
     > df
     > --
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     > https://pairlist5.pair.net/mailman/listinfo/coco
     >
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