[Coco] DE-0 Nano Successfully Programmed!

[Mark McDougall]

On 6/06/2015 10:41 AM, Zippster wrote:

> The Quartus design environment supports both.

And, perhaps more importantly, it (also) supports mixed language synthesis, 
which means your projects can contain both VHDL and Verilog.

Not sure why reviews would suggest Verilog is the "main" HDL, perhaps 
because it is favoured by some of the tool builders. For example, at least a 
few years ago, the newer QSYS would only produce Verilog code, whilst the 
older SOPC Builder could produce either.

It's not as if the VHDL support is stagnating either; v12.1 supports VHDL 
2008 standard.

Regards,

-- 
|              Mark McDougall                | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug>   |   with less resistance!"