[Coco] CoCoRX

Mark McDougall msmcdoug at iinet.net.au
Wed Jun 3 23:37:30 EDT 2015


On 4/06/2015 1:19 PM, Frank Pittel wrote:

>>> On Sat, May 30, 2015 at 02:43:25PM -0500, Melanie and John Mark Mobley wrote:
>>>> We need a diagnostic test that will prove out the cycle accuracy timing of
>>>> the CPU so that it can be used to test the FPGA design.

As others have mentioned, not only would it be quite difficult (but 
ultimately possible) to have software determine the cycle accuracy of 
the core, the best you'll get is a pass/fail indication, which is of 
very little use when you're "test[ing] the FPGA design".

The way you'd actually test the FPGA design would be to use 
purpose-built hardware to run the core in lock-step with a real 6809, 
taking care to exercise not only every instruction, but also every 
pre-condition as well (eg. conditional branches).

I actually have a PCB that allows you to plug a 6809 onto the expansion 
headers on a TerASIC DE1/2. It was designed and built by my colleague 
when he started work on his cycle-accurate 6809 core (which was never 
completed). What I have done, however, is use it to run 6809-based FPGA 
designs - including a Coco 1/2 - with an actual 6809, so I know the 
board works.

But again, as Frank said, isn't this primarily for "real" Coco's anyway?

Regards,

-- 
|              Mark McDougall              | "Electrical Engineers do it
|  <http://members.iinet.net.au/~msmcdoug> |   with less resistance!"


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