[Coco] Multipak redesign/replacement

[RETRO Innovations]

On 2/23/2015 10:12 PM, Gene Heskett wrote:
>
>
> I'd love more detail on this.  Not sure the speed of the 14L4 in the
> 3124, but I would think the 14L4 is a -20 or similar part.
> Whatever speed it is, by the time the bus turnarounds get to the chips, its
> one both direction for long enough to cause a logic short, bouncing the
> supply rails by a volt of more each.
Well, looking at the schematic, I see only 1 IC that can switch 
directions, which is the '245.  it's enable is controller by (SLENB | 
CTS | ( address[15:8] = ff & address[7:6] = 1)), so it could be driving 
the bus during a write cycle for the amount of time the GAL/PAL takes to 
process signals past the end of the current E cycle, which I assume can 
cause an issue.

>> Do you just want an 8 slot board design?  I was considering morphing the
>> design on the PC right now into an 8 slot design, but it does contain a
>> CPLD (-7ns) and uses HCT logic.
>>
>> Jim
> That does sound doable.  Can I help?
Mechanical is where I need help.  You sound like a micrometer kind of 
guy, and I am short on FDC cards or MPis here to micrometer.

  * I think you or Kip gave me some numbers on how far the board has to
    go into the Coco, but more precision here is always helpful.
  * The dimensions of the grounding tabs, how much space between them
    and the 40 pin connector, how deep the slots needs to be, etc.
  * What is the shortest card length needed for a "stubby" PCB1, to go
    with ribbon cable MPI idea.  I assume it has to be long enough to
    grab hold of it to pull it out without yanking by the ribbon cable
  * Is there a cart case template or set of dimensions that would be
    useful for someone wanting to put the stubby portion with the
    buffers into a case?
  * height off the table of the PCB.  I buy nylon spacers to suit, but
    need a height.


As a matter of principle, I put all my PCB designs under Creative 
Commons, so anyone can use them, and all Verilog is under GPL (anyone 
can use, but must share :-)

As well, someone to look over the schematic is always helpful.

The 4 port board schematic is mainly done (gotta wire up the CPLD, but 
the Verilog synthesizes and gives no errors).  I need to switch to a 
TQ100 CPLD part for the 8 port version, but that gives me 20 more IO 
pins, and that should be plenty (4 for CART, 4 for SCS, and 4 for CTS

On my designs, I typically put a 5th (or 9th) connector on the PCB, out 
the edge, electrically connected to the final connector (4th or 8th).  
That allows one cart to be horizontal.

Jim