[Coco] 32kB carts on Coco 3

[RETRO Innovations]

On 12/29/2015 5:42 PM, Darren A wrote:
> On Tue, Dec 29, 2015 at 3:17 PM, RETRO Innovations wrote:
>
>> Does anyone have a link to how it works?
>>
>> I read that it is the work of the GIME, and I assume it's the bank
>> registers for task 0 and 1 (1 and 2?) that make it work, but I'm trying to
>> understand what shows up on the cart port...
>>
>> Specifically, how does the upper 16kB of a 32kB cart get accessed from the
>> cart port?  Is the 2nd 16kB mapped to $8000-$bfff?  If not, then where?
>>
>> Jim
>
>
> The two low-order bits of the GIME's INIT0 control register (FF90)
> determine the ROM mapping mode:
>
> 0x = 16K internal (8000-BFFF) and 16K cartridge (C000-FDFF)
> 10 = 32K internal (8000-FDFF)
> 11 = 32K cartridge (8000-FDFF)
>
> It simply determines which address range causes the CTS* signal to be
> asserted (C000-FDFF, never, 8000-FDFF). You also have to be in Map Type 0
> for any ROM access to work, be it internal or cartridge. The exception is
> FFE0-FFFF which is always mapped to the internal ROM regardless of INIT0 or
> the Map Type, but you can assert SLENB* to override that.
>
> - Darren
>
Thanks for the information.  Now, how to incorporate into CocoFlash.

If I use A14 as one of the address lines to the FLASH ROM, then I 
effectively "lose" access to the lowest 16kB of the FLASH ROM IC...

Why, one may ask...

Well, the flash address lines are made up of a "bank" and the regular 
address lines from the Coco.  If the bank handles lines A15-A22, and we 
set the bank register to 0, on bootup, and we access $c000, A14 is high, 
so the second 16kB flash rom bank is accessed. here is no way to move 
the first bank into the $c000-$ffff address range.  (well, techically, I 
think you can using my design, which is more complicated than the above 
description, but it's a hacky way to get to the space)

One way to fix this is to invert A14, but then that messes with the 
memory map visualization (if you are using the 32kB window, the lower 
16kB is in the second 16kB bank of the FLASH ROM, and vice versa.

I'm assuming giving up full access to the lowest 16kB of an 8MB IC is 
OK, so that's the current design, but comments are welcomed.

jim


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