[Coco] dwwrite suggestion

Robert Gault robert.gault at att.net
Wed Dec 25 19:49:30 EST 2013


Darren A wrote:
><snip>
>
> I do NOT recommend this change.
>
> The code above is for 6309 native mode.  A NOP instruction is only 1 cycle
> in native mode, not 2.

You are right.

>
> The BITA instruction is not testing the bit value, but the rather the bit
> number.  This causes the cycles-per-bit to alternate between 15 and 16
> cycles (not random).

Thank you for the explanation.

> The reason for the alternating bit timing is because
> at 57600 bps, there are 15.536 cycles per bit (894886.25 divided by 57600).
> Without the alternating bit timing, the code will drift too far from the
> ideal sampling point.
>
> Darren
>

Darren,

Except Level2 is running at 1.7897725MHz not 0.89488625MHz (see rel at Cont) so 
shouldn't the equation be 1789772.5/57600=31.072 . If that is true, then I'd 
think you would want a constant rate per bit.

More to the point, there is a significant deviation in timing between 15.5 and 
30.1 cycles/bit. There is no question about rel setting the fast clock so unless 
rbdw or dwio slows down the CPU, drift can hardly be an issue but an incorrect 
baud could be.

Robert





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