[Coco] Replacing Dynamic RAM with Static RAM

Fri Jun 11 16:40:08 EDT 2010

Absolutely - putting the logic into a CPLD would be ideal. The ideal latch 
would be a 9-bit non-transparent if you decide to put the design into a 
CPLD - you can use the schematic entry and let the development suite 
generate the HDL's. I'll send you all of the info when I get it together, if 
you want - just let me know - I love working out this stuff. It's like a 
puzzle, only way better :-)
J&R
----- Original Message ----- 
From: "Stephen Adolph" <twospruces at gmail.com>
To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
Sent: Friday, June 11, 2010 2:56 PM
Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM


>I have a large quantity of 1M x 16 3.3 V SRAM chips, and a large
> quantity of CPLDs.
>
> These parts are perfect for such a card.
>
>
>
> On Fri, Jun 11, 2010 at 3:06 PM,  <sales at gimechip.com> wrote:
>> I just noticed the mention of using a single 2-Meg SRAM. That's what I've
>> been working on, but the SRAM is 1024x16 for a total of 2-Megs by eight. 
>> The
>> GIME has a 16-bit databus (sort of). Even bytes are in one bank and odd
>> bytes in the other, thus a 16-bit SRAM or two 8-bit SRAMs are ideal. It 
>> can
>> be done with an 8-bit wide SRAM as well, I suppose, but I haven't tried 
>> that
>> yet.
>>
>> I am using a 16x4-bit RAM array with associated multiplexing circuits to
>> extend the MMU registers by 8-bits.
>>
>> Since I'm using Static RAM, no modified refresh is required, plus if the
>> SRAM is battery backed, the various RAMdisk software can be non-volatile
>> (although some of the RAMdisks initialize the disk automatically - that
>> behavior would have to be patched out)
>>
>> The video can only exist within a 512K block - this is a GIME limitation.
>> Using Tony's method, a register holds the Video Bank data. During a video
>> cycle, the video bank data is presented to the RAM to select 1 of 4 of 
>> the
>> 512K banks for video.
>>
>> The CPU, however, can access the entire 2-Megs via the normal paging 
>> method.
>> During a CPU cycle the DAT register addresses are presented to the Static
>> RAM.
>>
>> There's a little bit more to it than that (for example, the dual WE* 
>> signals
>> must be accounted for - I've done this by multiplexing them and using A0 
>> to
>> select which one passes to the SRAM for R/W* control - A0=0=even bank,
>> A0=1=odd bank). This should be completed soon. I'll upload everything to
>> coco3.com and maltemedia for any who want to make use of it.
>> J&R
>>
>> ----- Original Message ----- From: <sales at gimechip.com>
>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>> Sent: Friday, June 11, 2010 1:50 PM
>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>
>>
>>> Yes, that's what these were for, but I also uploaded a file that uses a
>>> 256Kx16 SRAM for the CoCo3 for 512K. It needs a bit of work. It's here:
>>> http://www.coco3.com/community/2010/06/512k-simm-and-sram-files
>>>
>>>
>>> ----- Original Message ----- From: "Stephen Adolph" 
>>> <twospruces at gmail.com>
>>> To: "CoCoList for Color Computer Enthusiasts" <coco at maltedmedia.com>
>>> Sent: Friday, June 11, 2010 1:21 PM
>>> Subject: Re: [Coco] Replacing Dynamic RAM with Static RAM
>>>
>>>
>>> Interesting.
>>> I've got a background activity thinking about how to use a single 2MB 
>>> SRAM
>>> chip.
>>> Seems that this is a way to replace each individual DRAM with an SRAM.
>>>
>>> Similar, yet different. hmm more thinking.
>>> Steve A
>>>
>>>>> On 6/11/2010 8:57 AM, sales at gimechip.com wrote:
>>>>>>
>>>>>> Over the past year, I've had some success at replacing DRAM with 
>>>>>> SRAM.
>>>>>> I
>>>>>> have posted some of the schematics and designs to CoCo3.com in these
>>>>>> threads:
>>>>>>
>>>>>> http://www.coco3.com/community/2010/05/512k-upgrade-question
>>>>>>
>>>>>>
>>>>>>
>>>>>> http://www.coco3.com/community/2010/06/4164-dram-sram-replacement-1-by-jr-of-gimechip-com
>>>>>>
>>>>>>
>>>>>>
>>>>>> http://www.coco3.com/community/2010/06/4164-dram-%E2%80%93-sram-replacement-2-by-jr-of-gimechip-com-c19-march-2010
>>>>>>
>>>>>> It is relatively simple to demultiplex the multiplexed address lines
>>>>>> and
>>>>>> to replace DRAM with SRAM. The above links should provide a great 
>>>>>> deal
>>>>>> of
>>>>>> information on how I've gotten it to work.
>>>>>>
>>>>>> As soon as I get the rest of my documents together on the 512K, 1M& 
>>>>>> 2M
>>>>>> CoCo 3 Static RAM upgrades, I'll get those posted as well. -J&R
>>>>>>
>>>>>> --
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>>>>>> Coco at maltedmedia.com
>>>>>> http://five.pairlist.net/mailman/listinfo/coco
>>>>>>
>>>>>>
>>>>>
>>>>>
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