[Coco] Assembler Question???
jdaggett at gate.net
jdaggett at gate.net
Wed Sep 2 18:51:01 EDT 2009
It is not the SUB command that I was querrying. What the main inquiry was if the
assembler converted a binary number and stored it as a 2's compliment or not.
I used it because if my assumption were true, then that would be the most likely
command to do it with. There is no way that I know of in logic gates to make a subtractor
other than by taking the subtrahend and converting it to its 2's complement and then
add. You can do the same with 10's complementer and then add decimal to do decimal
subtraction and so forth and so forth.
On 2 Sep 2009 at 15:36, Steve Bjork wrote:
> As many have pointed out the SUB command's Immediate data is the real
> number. (Not already 2's complimented.)
> There are many reason for doing this...
> First, the SUB command does not just use the Immediate data addressing
> mode but other modes to get the number. Just think, you want need to
> run 2's compliment on ever bit of data that used with the SUB command.
> Also, self modifying code would not work with the SUB command.
> You will need to do the extra work to make a complete SUB command.
> By the way, most older 8 bit CPU only had one ALU for both addressing
> and accumulator registers. When the could put more stuff on a chip,
> they added one or more ALUs for address calculations to speed up
> instructions. (Less clock states.)
> Oh yes, the Great PDP-8 Mini Main Frame computer had NO SUB command.
> Even the 6800 had more instructions and addressing modes.
> The good old days when men were men and coders went crazy!
> Steve Bjork
> jdaggett at gate.net wrote:
> > To the list:
> > I have started looking at two FPGA cores for the 6809 in altering one of them to handle
> > 6309 opcodes and stumbled across a potential issue. As far as I can remember the
> > Motorola Freeware Assemblers treat subtraction as adding the 2's compliment of the
> > subtrahend. Also I seem to remember that is how the internal workings of the MC6809
> > is. There is actually no subtractor but the assemly code has the 2's compliment of the
> > subtrahend and does addition.
> > If this is so then, the ALU becomes simpler when doing a FPGA core.
> > james
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