[Coco] 6551 at 115200 bps (Roger's CoCo Net)

Steve 6809er at bjork-huffman.net
Sun Jan 18 16:11:28 EST 2009


To Roger and all...
Like most chips, 6551 was designed to work with a 1.8 MHz crystal but 
sometimes a production run of a chip can be clocked little faster. 
But looking over specs for the 6551, pushing the chip to double speed 
is a bit of a hit and miss.

The place where you get into real problems is reading the data at 
those speed.  With only 15 clocks cycles to do the following...

Test for new data
Read the data
Decide that to do with it.
And then decide to loop for more data.

As you can see, that's a lot of work do in only 15 clock cycles and 
if you are not there in time to read the next byte then it's lost forever.

That's why IBM's PC (back in the early days) swaped out the single 
byte UART for a 16 byte (or more) FIFO buffer UART chip.  While code 
still needs to be overall fast enough to read the data, it can take a 
break to handle some overhead in the decision code. (Or an interrupt or two.)

On a side note: This need for quick timing loop is why Tandy used the 
Halt and Load design for the Floppy Disk Controller.  The timing was 
too tight to have the CPU test for a byte being ready so they just 
halted the CPU till till the byte was there.  (It was up to the 
interrupt to end the reading loop.)  Not the best design.  But it was 
cheap and worked.

One advantage you have with CoCo Net Roger, you can design the data 
transfer protocol so you don't to take too long in the read loop.

Roger's CoCo Net is one those "tight bits of code" that redefines 
what you can with a CoCo.  The Internet has changed just everything 
in our lifes and now the CoCo can be part of it.

Great going Roger.  My hat was off to you for the RAINBOW IDE, now I 
got to find that hat again for CoCo Net.

Steve (Zaxxon) Bjork

At 09:31 AM 1/18/2009, you wrote:
>Has anyone noticed on Sock's website he mentions that doubling the 
>6551 crystal value to 3.6864 mhz can be done but setting the 6551 to 
>the ExternalClock/16 mode would yield 115200 bps, then he says:  " 
>this *almost* works! "   Why wouldn't it work?
>
>We've proven that the CoCo can send and receive through the 
>BITBANGER port at 115.2 bps, and believe it or not - 230.4 kbps.
>
>Maybe Sock means that IRQ can't be triggered that fast and the CoCo 
>keep up?  Why not?  The 6551's IRQ goes to the CART signal which is 
>tied to FIRQ.  A circular buffer in the FIRQ service routine could 
>do a quick FIFO store to a buffer and it should work?  If not, the 
>crystal should probably be dropped to 1.8432 / 2  to yield a 57600 
>bps mode which should work.
>--
>Roger Taylor




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