[Coco] [Color Computer] Hardware specifics regarding GIME , RAM and ROM

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> -----Original Message-----
> From: ColorComputer at yahoogroups.com 
> [mailto:ColorComputer at yahoogroups.com] On Behalf Of Mike Pepe
> Sent: Wednesday, April 29, 2009 11:15 PM
> To: ColorComputer at yahoogroups.com
> Subject: RE: [Color Computer] Hardware specifics regarding 
> GIME , RAM and ROM
> 
> > I have a few questions regarding the GIME, RAM and ROM.
> > 
> > 1) If I understant what I have read so far, if $FFDE is written to,
> > then the
> > memory will be in ROM mode, meaning $8000-$FEFF will be 
> accessed from
> > rom?
> > How does the MMU registers $FFA0-$FFAF affect this? Can those ROM
> > addresses
> > be remapped to different memory slots? (Instead of $8000 being at
> > $78000,
> > can it be read from the equivalent of $18000, etc?)
> 
> No, the MMU affects RAM only.
> 

So $8000 - $FEFF will ALWAYS see the ROMs at those addresses unless un $FFDF
is written to,
at which point $8000-$FDFF will be logical RAM? What about $FE00-FEFF?

>  
> > 2) When $FFDF is written to set RAM mode, are the ROMs no longer
> > accessible
> > until $FFDE is written back to?
> 
> Yes
>  
> > 3) Also, if I understand correctly, there is 32K worth of ROM space,
> > mapped
> > either 32K internal, 32K internal (Cartridge?), or 16K internal/16K
> > external. Does bit 2 (MC2) of $FF90 determine WHICH external ROM (if
> > there
> > is a multipack in use) is mapped for the 32k external or 
> 16k external?
> 
> There is a 32k internal ROM on the CoCo3. And no, that register only
> affects which range of addresses toggle the CTS signal at the 
> cart slot.
> 32k internal would be no addresses mapped to CTS, 16k/16k would be
> $C000-$FDFF mapped to CTS, and 32k external would mean $8000-$FDFF is
> CTS
>  
> > 4) Is $FF00 - FFEF ALWAYS mapped for hardware no matter what MMU
> > registers
> > are set or RAM/ROM mode, etc? And are they always mapped to $7FF00 -
> > $7FFEF?
> > And what about $FFF0-$FFFF, I understand they are mapped to
> $BFF0-$BFFF
> > for
> > the vectors in the ROM. Is this ALWAYS the case no matter 
> what the MMU
> > registers and RAM/ROM mode are set for?
> 
> $FF00-$FFFF always maps to the hardware and vectors, not 
> $7FF00. You can
> use that MMU block ($3F) of RAM completely- it makes no 
> difference what
> you set the MMU block that physical 6809 $DFFF-$FFFF is mapped to,
> physical address $FF00-$FFFF is always the hardware. 
> 
> Keep in mind the vectors by default point (mostly) to a 
> non-mmu block of
> memory at $FE00-$FEFF (which I believe is actually in MMU block $3F)
> 

OK. I understand. but I what I think may be a correction to the statement
comes from the Unravelled Series I re-presented some years back: "The GIME
chip (and the
SAM chip in the older CoCos) redirect the CPU's address request from the
$FFF0-
$FFFF range to $BFF0-$BFFF so that the interrupt vectors can be stored in
the Basic
ROM." on page 29. Is this correct still?


>  
> > 5) Lastly, I guess bit 3 of $FF90 controls whether the 256 
> bytes from
> > $FE00-FEFF are always present at that address no matter if banks are
> > switched around? If so, is this space mapped to $7FE00 to $7FEFF?
> 
> I believe that is the case
>  
> > I am trying to get a better understanding of how the GIME, 
> RAM and ROM
> > interract.
> 
> 
> 
> 
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