[Coco] (no subject)

jdaggett at gate.net jdaggett at gate.net
Mon Jan 14 10:46:24 EST 2008


Dave

The timings to the RAM are controlled by the GIME chip. The same goes for 
the SAM chip. During one half the machine cycle the the GIME is reading 
ram for video display and the other half is for the CPU to read and write to 
ram. This timing is fixed and using faster access ram will not improve 
operation one iota. 90nS access dram chips will perform no faster than 
120nS accress drams. 

With the IDMA scheme that the Coco uses, the only  requirement for the 
dram is that it have access times equal or better than one half the machine 
cycle period. 

As for using the HC11,  that line of processors does not have the U register 
and there are instructions on the 6809 that are not  in the HC11 set. Also the 
same for the HC11 to 6809. 

james 

On 13 Jan 2008 at 18:10, Dave R in Illinois wrote:

> 
> 
> 
> 
> So If I understand correctly, faster memory would help a tad with
> simple 
> 
> calculations but when it comes to anything being drawn on screen, the 
> 
> GIME is the limiting factor, not the ram. Interresting. Reason I ask
> is, 
> 
> I was interested in building a coco from scratch, similar to
> CoCoZilla, but
> 
> Replacing the 6309/6809 with a Freescale 68HC11 to lower part count.
> 
> 
> 
> 
> 
> Thanks a bunch :D
> 
> 
> 
> Dave
> 
> 
> 
> 
> 
> 
> 
> 
> 
> I *think* I have some 120ns stuff in my 2nd coco3 with a half meg
> board in it. The 2 megs kit in the main one is 90ns I think. Those
> both work ok and the 90ns stuff runs dead cold at the actual clock
> speed it is being run at. I can toss a furniture blanket over it with
> a photo thermometer under it, and the temp rise after several hours is
> 2 degrees. It also has a 63C09 in it and is running on an old AT power
> supply wired externally. But it isn't the memory speed that controls
> the coco's speeds, its the 'dot' clock speed being tied to the display
> standard where the machine was intended to be used. That
> 
> is in the general area of 14.3 mhz, and is further divided by either
> (IIRC) 8 for the 3's, and 16 for the originals and 2's to get the
> actual cpu clock of
> 
> (for NTSC, PAL is slightly different) 0.889 mhz for the 1's and 2's,
> and 1.79 mhz for the 3's. 
> 
> A side comment here, applicable to the 63C09 equipt machines. The cpu
> is not
> 
> the limiting factor for speed, the gime is. Its output drivers are so
> puny they simply cannot drive a memory interface line fast enough to
> make use of faster memory. What we really, really need, is a
> replacement gime made with modern cmos technology. And thumb our nose
> at the FCC who mandated the noise
> 
> abatement design that made it so in the first place, combined with
> Tandy's refusal to apply a shielding scheme that might have actually
> worked. But I digress... 
> 
> 
> >Dave 
> 
> > 
> 
> >On Saturday 12 January 2008, Lazy wrote: 
> 
> >>Would upgrading the memory in a Coco 2 from 20ns to 10ns provide a 
> 
> >> 
> 
> >>noticeable difference in speed? 
> 
> > 
> 
> >Since memory speed of the original was about 250ns, and the cycle
> >itself is
> 
> 
> >much longer than that, no. And it may lead to troubles using memory
> >that 
> 
> >fast in a circuit designed for 10x slower speeds as the faster memory
> >may 
> 
> >suffer from noise glitches the slower stuff ignores. 
> 
> > 
> 
> > 
> 
> > 
> 
> > 
> 
> >-- 
> 
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> 
> >Coco at maltedmedia.com
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> 
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> 
> 
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