[Coco] 256K RAM chips

John Eric jet.pack at ymail.com
Sat Dec 27 21:22:27 EST 2008


Demultiplexing the z-bus shouldn't be too much of a daunting task. First, the addresses are multiplexed into two groups of 9 and 9 (row and column). Row is presented first, and is indicated bt RAS* active and absence of CAS*. So use a latch that latches when RAS*=0/CAS*=1 to get first half of address. Use a second latch, which has been made ready by previous latch, or whatever, but have it latch when RAS* is STILL low from previous, but then CAS* goes low. which gives second half of address. Also note: during a write cycle. the data AND WE* are active prior to CAS*. Shouldn't be too difficult, but you should have the CoCo 3 timing diagrams handy - it'll go a lot easier that way :) JE




________________________________
From: "jdaggett at gate.net" <jdaggett at gate.net>
To: CoCoList for Color Computer Enthusiasts <coco at maltedmedia.com>
Sent: Saturday, December 27, 2008 7:58:26 PM
Subject: Re: [Coco] 256K RAM chips

On 27 Dec 2008 at 20:54, jdaggett at gate.net wrote:

> > Can you guys tell me if I might be able to use these memory chips in
> > a Color Computer 3 project? Any ideas?
> > 
> > http://exwn8jef.googlepages.com/cocoprojects
> > 
> > Alan Jones
> 
> 
> Not without some means of demultiplexing the memory address from the
> Z-Buss. To achieve the 20 bit address you will need other logic and
> use the RAS/CAS signals to convert the 10 bit multiplexed address to a
> 20 bit address to use SRAMs. 
> 
> james

Correction and addition

The stock GIME chip only outputs 18 bits of address. Also the GIME sees the stock 512K as 
256Kx16 configuration. Therefore you will have to put your SRAMs into a 256Kx16 or two 
banks of 256Kx8.

james

--
Coco mailing list
Coco at maltedmedia.com
http://five.pairlist.net/mailman/listinfo/coco



      



More information about the Coco mailing list