[Coco] 6309 andcc z,v ?

[jdaggett at gate.net]

On 8 Jun 2007 at 19:42, Roger Taylor wrote:

> While looking through an "as09.exe" assembler test file, I noticed the
> following line:
> 
>                  andcc   z,v                         ; alternate
> 
> And the source code assembles without errors!  You would think the
> author meant, "exg z,v" but even that is strange unless he means "0,v"
> since "0" is actually the name of a 6309 register.  Actually, there's
> two 0 registers, so in CCASM I call them "0" and "00" I think.  I
> might add the "z" name in case someone is used to it, but still...
> what the heck is andcc z,v, and what does it do?
> 
> Examining the code stream, I see that the opcodes for the above 
> instruction are:
> 
> $1C $F9
>
> I'm not able right now to spend time running this through a debugger
> to watch the CPU registers, so if anyone wants to check this out and
> post your findings, please let us know what happens!
> 
> -- 
> Roger Taylor
> 

The opcode $1C is the 6809 opcode of ANDCC followed by a mask byte, $F9 
would "and" the Z and N bits with "0" thus the instruction 

ANDCC Z,N 

will clear the Z and N bits of the Condition code register. The ANDCC instruction 
was added to the MC6809 because unlike its predicessor the 6800 which had 
CLEAR and SET  instructions for the bits of the Condition Register (ie CLC, 
SEC). The 6809 does not. To keep that functional capacity in the 6809  they 
added the ANDCC and ORCC followed by a mask byte. 

james