[Coco] [Color Computer] Re: POKE 65495,0

[jdaggett at gate.net]

On 3 Feb 2007 at 18:58, James Diffendaffer wrote:

> James, if your read back through the tread you'll find we were talking
> about running the CoCo 1/2 in SAM high speed mode with the RAM refresh
> disabled.  
> 
*************
First off I don't believe that you can disable the refresh counter on the SAM chip. 

> You can run a program faster this way but you have to enable the
> refresh about every 4 to 4.5 seconds to keep DRAM from loosing it's
> contents. The alternative is to do a read on each column at least
> every 4 seconds.  By my calculations, one read each interrupt should
> let 64K RAM hold it's contents just fine.  For 32K it could be every
> other interrupt.
> 
**************

Second if you wait 4 seconds to refresh ram then it will forget what was stored. 
Refresh needs to be every 4 milliseconds for standard 4116/4132/4164 drams.


> 60 interrupts / sec for NTSC 
> 256 rows for 64K or 128 rows for 32K
> 
************

64Kx1 drams have 256 rows as so do two banks of 16Kx1 dram to make 32K also  
have 256 rows. 



> That means it takes NTSC about 4.27 seconds to refresh 64K and half
> that for 32K.  PAL might not be able to refresh a full 64K fast enough
> since it takes over 5 seconds using 1 read / interrupt.
> 

Your dram will be very forgetful if you refresh every 4.27 seconds. 

james