[Coco] Re: Re: Questions about the 502 controller vs theDisto SCII

Warren Hoslet dermunda at hotmail.com
Thu Jul 27 02:38:01 EDT 2006


>>How is ho-halt implemented by the SCII? Does it perform disk I/O from a  
>>buffer on the controller card without requiring the 6809 to handle the  
>>timing-critical task. If the 6809 has to do the work I would think that  
>>it would still have to mask interrupts which would prevent keyboard  
>>type-ahead. Since I have no technical knowledge of the SCII, I'm just  
>>speculating.
>>
>>- Warren
>
>     The controller does the sector transfer on it's own to an internal  
>buffer; the Coco then reads the entire sector's worth of data in one  
>chunk, with interrupts still functioning. Quite a few of us tried to get a  
>native mode 6309 driver for the floppy controller to be able to read the  
>controller live without having to enable the HALT line, but we couldn't  
>quite get it fast enough.

It isn't too hard to do sector I/O without using the HALT line, but you 
still need to mask interrupts so I'm not sure what the point would be. I 
implemented a read routine that works (with limited testing) on a CoCo 2 
with an FD-501. You just have to monitor the DRQ bit in the status register 
($FF48) to know when a byte is available. The trick is that after a certian 
number of cycles have elapsed without a DRQ, you must assume the transfer is 
complete and stop testing the status register so that you don't clear the 
INTRQ request when it comes. Below is just the read loop portion of my 
routine. The DP register is set to $FF, and B contains the mask for the DRQ 
status bit.

getbyt  LDA     <$4B      Get byte from FDC
        STA     ,X+      Put into buffer
       	NOP
       	NOP
       	BITB    <$48    Check FDC status for DRQ
        BNE     getbyt   Get next byte if available
       	BITB    <$48    Check again
        BNE     getbyt
       	BITB    <$48    Check one last time
        BNE     getbyt

* At this point assume there are no bytes remaining  (timing is important)
        SYNC            wait for NMI interrupt





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