[Coco] Fw: CoCo Hardware Questions

Dino Steeman dino at dds.nl
Mon Jan 24 15:56:04 EST 2005


Hi,

In an effort to understand the internal workings of the CoCo I have been
reading
up some books and articles, but as I only have a basic understanding of
electronics and computer hardware, there are a lot of things that are
unclear.

The 6809 CPU and the VDG both need to access RAM memory and this is mediated
by
the SAM chip. SAM sends out several clocking signals to achieve this
"interleaved access". To get a more precise idea of what happens, I set up a
sequence of events or so-called 'use case':

1. SAM sends a high E-signal to 6809
2. 6809 accesses RAM at the address specified by the Program Counter
register
3. RAM address sends byte to 6809 (6809 reads RAM address byte)
4. 6809 acts on byte (executes instruction)
5. SAM sends a low E-signal (to 6809)
6. VDG accesses RAM at the address specified by ....?
7. VDG reads byte at RAM address and sends data on to video signal generator
(1372)
8. repeat steps 1...7 until power is cut

The following is probably not 100% correct and accurate, but should be
roughly
OK as far as I understood.

Now I have a couple of questions:

* There is only an E-line going to the 6809 and not to the VDG. How does the
VDG
"know" when to access memory? Does the 'clock'-pin do the trick?

* What does the Q-signal do?

* As the VDG is reading one byte at a time, and as it must manage to go
through
the entire videoram, is there a screen image stored anywhere for the
video-signal? (I know, complex question, but still...)

I hope you guys can help me with having these questions answered. Thanks in
advance!

Cheers,

Fedor





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