[Coco] assembly questions?

[jdaggett at gate.net]

Kevin


I can best start off with the EXG and TFR instructions.

The register stack of the 6809 can be seen as six 16 bit registers. X,Y,S,U are 16 bit 
pointer registers. D is a 16 bit accumalator that can be addressed as A lower 8 bits 
and B upper 8 bits. The Direct Page (DP)  register and the Condition Code 
Registers form the sixth 16 bit register where the CCR is the lower 8 bits. The CCR  
is written internally as is the DP regiater. The TFR instruction is useful in setting up 
the DP register. Thus allowing the 256 bytes of Direct Addressign mode to be 
mapped into any 256 byte block of memory.

Since the  TFR and EXG intructions have no designation as to whether it is to be an 
8 bit or 16 bit instruction. So it predisposes that all are 16 bit moves. 8 bits at a 
cycle. Both instructions have a post byte so that the first two cycles are loading the 
instruction and the post byte into a the 16 bit IR. 

with the TFR instrtruction the third and fourth cycle write R1 to a temp register 
internally. On cycle 5 and 6 the temp register is written to R2

With the EXG instrtuction the thrid and fourth cycle wirtes R1 to the temp register. 
On the fifth and six instruction the contents of R2 is written to R1. on the seventh 
and eighth cycles the temp register is sritten to R2.

As for the Condition Codes, the is is kind of odd but one gets use to it.It is best to 
accept the Programming manual as is. To explain why gets into the actual wiring of 
the processor and for programming matters t his is not necessary.

1.10.1.2 Negative (N) Bit 3. This bit contains the value of the most-siginficant bit of 
the result of the previous data operation.

1.10.1.3 Zero (Z) Bit 2. This bit is used to indicate tha the result of the previou s 
operation was zero.

1.10.1.4 Overflow (V), Bit 1. This bit is used to indicate that the previous operations 
caused a signed arithmetic overflow.

The (ST) instruction  will always clear the overflow bit. The carry and and Half carry 
are not affected. As for the Zero and Negative bits the result is tested. If the 
operation meets the 
condidtion above, the the bits are set, otherwise cleared.

The Clear instruction is taking the operand and substracting it from itself. Therefore 
the result is always Zero. The Z bit is set. Because the operation is a subtraction of 
itself from itself there is no carry or borrow. So the N bit, the V bit and the C bit are 
cleared. 

hope this helps

james


On 22 Jul 2004 at 10:26, Kevin Diggs wrote:

Date sent:      	Thu, 22 Jul 2004 10:26:50 -0700
From:           	Kevin Diggs <kevdig at hypersurf.com>
To:             	coco at maltedmedia.com
Subject:        	[Coco] assembly questions?
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> Hi,
> 
>  Can anyone tell me why store instructions affect the flags?
>  Why does clear affect v or c?
>  Why are transfers (tfr) and exchanges (exg) so slow? (6 and 8)
> 
>      kevin
> 
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