[Coco] Re: Undocumented opcode $3E

[jdaggett at gate.net]

Torsten

>From the 1981/1983 6809 Microprocessor Programming manual there is an 
instruction listed in the description area called RESTART. Yet ther eis no 
indication of what the opcode is. It is not in the OPcode summary or in the 
Opcode map either. 

Here is what it does.

F and I bits of the CCR aer set. 
DP register is cleared. 
PC lis loaded with $FFFE and then $FFFF.

Adressing mode is Extended Indirect Mode. 

>From what I can gather from gleening through the above manual and other 
material, this instruction appears to be a software reset/restart. It was then 
the duty of the Reset routine to determine if the reset is a power on 
reset(external) or software reset (internal).

The RESTART will function only as an instruction while the RESET Pin is 
actually treated as the highest level of IRQ. It will even mask the NMI IRQ. 
>From what I can gather, it looked as if Motorola intended to do some 
means of hard or soft reset and it really did not works so they told noone 
about the opcode RESTART or where it was in the opcode map. 

On eother thing the RESET Pin will interrupt any instruction that is in the 
process of execution, even if it is in the middle of the instruction execution. 
The RESTART instrruction is decoded as an instrtuction and starts 
executing the RESET routine vectored at FFFE/FFFF.

james


On 26 Jan 2004 at 11:40, Torsten Dittel wrote:

To:             	coco at maltedmedia.com
From:           	Torsten Dittel <Torsten at Dittel.info>
Date sent:      	Mon, 26 Jan 2004 11:40:58 +0100
Subject:        	[Coco] Re: Undocumented opcode $3E
Send reply to:  	CoCoList for Color Computer Enthusiasts 
<coco at maltedmedia.com>
	<mailto:coco-
request at maltedmedia.com?subject=unsubscribe>
	<mailto:coco-
request at maltedmedia.com?subject=subscribe>

> Already found that one:
> 
> $3E     Inherent    RESET - Jumps to the reset handler.
>                     - Stacks all registers, without setting the E-bit
>                       in CC.
>                     - Then sets the F and I interrupt masks
>                     - Then jumps to the reset handler.
>                     Unlike a hardware reset, the NMI is not 
>                     masked until the first load of SP.
> 
> 
> Any further details, comments?
> 
> 
> -- 
> Coco mailing list
> Coco at maltedmedia.com
> http://five.pairlist.net/mailman/listinfo/coco


-------------- next part --------------
An HTML attachment was scrubbed...
URL: <http://five.pairlist.net/pipermail/coco/attachments/20040126/494da8eb/attachment-0001.html>