[Coco] Indexed addressing postbyte

[David Gacke]

Thanks all!

I think I've finally got it.  I was about to have a brain hemorrhage
when I looked at that bizarre combination o' stuff that is packed into
one lousy byte.

It still makes for a lot of assembler code to emulate it. Doesn't really
matter though, even with the CoCo in high speed, I've still got a 15:1
advantage in actual instructions executed in relation to its bus speed.
:)


I'm anxious to see this if this goofy thing works. It "should" work, but
who knows. There may be a LOT I'm not taking into consideration.


Thanks again,

Dave Gacke



-----Original Message-----
From: coco-bounces at maltedmedia.com [mailto:coco-bounces at maltedmedia.com]
On Behalf Of jdaggett at gate.net
Sent: Sunday, August 08, 2004 8:40 PM
To: CoCoList for Color Computer Enthusiasts
Subject: Re: [Coco] Indexed addressing postbyte

David

Here is the way that I find to understand how it functions.

Bit #7 when zero bits 0 to 4 are the offset to the register bits 5 and 6
are pointing to 
in 2's compliment form. Otherwise Bit #7 will always be one. 

Bits 6 and 5 denote register involved

00 --> X
01 --> Y
10 --> U
11 --> S

Bit #4 tells the processor if it is indexed mode or indeirect indexed
mode.

Bits #3 to 0 are the opcode bits to tell the processor what operation to
do. 

0100 --> no offset
1000 --> 8 bit offset 2's compliment
1001 --> 16 bit offset 2;s compliment

0110 --> use what ever is in accumalator A
0101 --> use what ever is in accumalator B
1011 --> use what ever is in accumalator D

0000 --> auto increment by one, not valid in indirect indexed mode
0001 --> auto increment by two
0010 --> auto decrement by one, not allowed in indirect indexed mode
0011 --> auto decrement by two. 

The next two opcodes act on the PC regardless of what is in bits 5 and
6.
1100 --> offset 8 bits to PC
1101 --> offset 16 bits to PC

1111 --> extended indirect mode.   

Again when bit 7 is zero, you are addign a 2's compliment of a five bit
value that will 
be found in bits 0 to 4 to the register that bits 5 and 6 are pointing
to.  Every thing 
else is pretty somewhat easy to follow when shown.

The information in the post byte is generated by the assembler.

hope this helps.

james

On 8 Aug 2004 at 19:43, David Gacke wrote:

From:           	"David Gacke" <dgacke at ektarion.com>
To:             	"Coco List" <coco at maltedmedia.com>
Date sent:      	Sun, 8 Aug 2004 19:43:06 -0500
Subject:        	[Coco] Indexed addressing postbyte
Send reply to:  	CoCoList for Color Computer Enthusiasts 
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> Hi All,
> 
> Could someone explain to me how the postbyte for indexed addressing
> breaks down.
> 
> The book I have isn't clear (to me) on how to determine what it's
> supposed to do.
> 
> Thanks very much,
> 
> Dave Gacke
> 
> 
> 
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