[Coco] The 6502 sprints ahead of the 6809: 100Mhz 6502

[Dave Philipsen]

I *think* the current 6809 core will do at least 50 MHz because I did it 
once using internal memory (block RAM). Part of the limitation of 25 MHz 
that we have on the CoCo3FPGA and CoCoDEV is that it is conveniently the 
same frequency as the VGA dot clock with which it shares cycles, and we 
have an external memory bus to contend with.  If you're not having to 
share memory with a video subsystem and you're using the ultra fast 
internal RAM of the FPGA and you use a more current generation of FPGA, 
the 6809 core may very well run at 100 MHz. But you are right, as of yet 
we don't have a bona fide implementation of that. Although, apparently, 
the guys working on the Turb09 project have not only achieved 100 MHz 
but have also pipelined the architecture to get even more speed out of 
it although nothing yet has been released to the public.


Dave


On 10/14/2021 5:18 PM, RETRO Innovations wrote:
> On 10/14/2021 10:20 AM, Dave Philipsen wrote:
>> This is an interesting design and nice packaging in the 40-pin DIP. 
>> However, in order to run as fast as it does, apparently it copies 
>> external ROMs to its internal RAM and then uses that internal RAM 
>> exclusively when it runs and then only accesses external stuff for 
>> I/O and it slows itself down to do that. So I doubt that it really 
>> ‘sprints ahead’ of the 6809 in that regard because we have the 6809 
>> available in FPGA that could likely do the same thing. Likely this 
>> device is limited to 64K and would not have the ability to access a 
>> larger amount of RAM like the CoCo 3 does (512k, 2M, 8M) without some 
>> trade offs.
>>
>> So it isn’t exactly a drop-in replacement for a 6502 since it can’t 
>> deal with external RAM and it would have to be customized for 
>> different environments.
>
> The presentation goes over many of these items:
>
>  * It is indeed limited to 64K internal RAM, but has a capability to
>    handle bank switching.  Author notes it is not tested and isn't sure
>    it's needed for the use case, as it does slow down (I assume it
>    copies all the 64 K of the current bank into internal, flushing it
>    each time the banking changes.
>  * The customization (some of it anyway) can be done via DIP switches
>    on the top of the unit.
>  * Point is made, though, that the exact same HW design could be loaded
>    with 6809 core, if a 100MHz 6X09 core exists.  I don't think one
>    does at this point.
>
> Thus, I think, at least until someone cleans up the timing on the 6X09 
> cores so they can do 100MHz, the OP has a point.
>
>
> Jim
>
>


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