[Coco] Some may call this heresy

[CoCo Demus]

If you look the any 6545 datasheet waveforms you will see it expects the
R/~W to be low (or high) before the phi2 goes up. On the C64 the are all go
up together, also the chip should be enabled ~CS before PHI2 goes up.

On Wed, May 30, 2018 at 9:28 AM, Johann Klasek <johann+coco at klasek.at>
wrote:

> On Tue, May 29, 2018 at 11:13:46PM -0700, CoCo Demus wrote:
> > I tried different approaches, even:
> >
> > STA $DF76
> >
> > is not reliable, from time to time a a read can be issued and I don't
> know
> > what is it. Could it be the VIC interrupting the CPU ? I checked for IO2
> > low as well but it does not work.
>
> The VIC may only interrupt the CPU (with signal RDY) on read-cycles ...
> STA abs has 3 cycles
> reading the opcode and the operand bytes. On the 4th cycle the write is
> not interruptible by RDY. Maybe you should check BA too, which is high if
> the VIC chip occupies the bus. In addition, PHI2 has to be high. I
> don't know it I/O2 could be low even BA is high (VIC access) or outside
> (PHI2 high, where probably VIC occupies the bus too) ... just poking
> around.
>
> > I tested with (),y but I don't remember if I tested with (,x)
>
> The latter should not the shadow read on the writing location.
>
> JK
>
>
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