[Coco] VCC possible bug in 6309 & 6809 emulation and general Wally news!

[Walter Zambotti]

Hi guys (and any girls)

 

I have been working on improving the performance of the VCC emulator and
have found a possible bug in the 6309 and 6809 implementation.

 

The Exg_M instruction has two issues:

 

1.       According to the 6x09_instruction_sets manual (pdf) the EXG (6309)
instruction allows exchanges of dissimilar sized registers (ie 8 to 16 bit).
The current implementation only appears to support exchanges of similar
sized registers and ignores all dissimilar size exchanges.

2.       The current implementation allows exchanges with the Z (zero)
register (which it should) but fails to zero the zero register afterwards.
In other words it allows the zero register to contain values other than
zero.

 

Similarly the 6809 also allows dissimilar exchanges which the current
implementation does not perform. There is no zero register on the 6809 so
this is not an issue.

This has probably not raised itself as an issue so far because of the rarity
of doing such things.

 

Testing any changes to the current implementation of EXG will require
specific assembly code to test the dissimilar exchanges and zero register
exchanges as I don't believe any code out there to date has ever exercised
this peculiar functionality.

 


In case you are wondering what I've been doing. I have been rewriting the
6309 emulator in x.86 assembler. The performance improvements of the
instructions I have so far converted are significant.  I have written (WIP)
a cpu verification suite that runs two CPU emulators in parallel and
compares all results after each instruction.

 

I have also revisited the mmu hardware acceleration modification that I
began looking at last year.  The last time I tested this on windows I
discovered 2 limitations.  Windows either has a 64K page size or a 4k page
size that does not allow sharing.  I have subsequently discovered that the
intel mmu hardware is not the issue and the issue is restricted to the
Windows OS as Linux does not suffer from this restriction.  I have
successfully created a test hardware accelerated CoCo MMU under linux.  Of
course porting the rest of VCC to native Linux is a major issue.

 

Microsoft have announced .Net Core 3 will provide WPF so when this makes it
across to Visual Studio Code a port of VCC to VSC will be difficult but
possible.

 

The other interesting thing I have discovered is the LEON FPGA CPU project.
It provides state of the art CPU architecture mechanisms such as advanced
pipelining and caching and SMP support for a SPARC CPU.  The interesting
thing is some universities use it as a base for implementing the 68008 CPU.
I would like to learn enough about FPGA programming to use the LEON base to
implement a 32 bit multicore 6309.

 

I thought I would bring the LEON project to the other FPGA'rs attention.

 

Keep on Coco'n

 

Walter