[Coco] GIME DRAM address mappings

[RETRO Innovations]

A few mistakes a made last night, as it was late and I wanted to get 
this on-list for posterity before I forgot some of it:
>> As I continue to debug CocoMem in hopes to have it functioning for Tandy
>> Assembly (not working yet :-( ), I found I needed to reverse engineer how
>> physical addresses in the memory map get translated in DRAM addresses via
>> the GIME.  Perhaps this is old news, but I had not seen it anywhere:
>>
>> As the physical address gets sent to the GIME, it is split into two parts,
>> the portion that will be mapped into the MMU, and the rest.
>>
>> The GIME then parses the final 18 bit address into 3 pieces:
It's a 19 bit address.
>>
>>   * odd/even address (bit 0)
>>   * lower 9 bits of word address
>>   * upper 9 bits of word address
>>
>> The lower 9 bits are transferred while E is high on the falling edge of
>> RAS (row address strobe).  The upper 9 bits are transferred on the falling
>> edge of CAS (column address strobe).
>>
>> The mappings are a bit weird, so here they are:
>>
>>   * A0 -> !WE0 if even, !WE1 if odd
On writes.  On reads, the decision to use odd or even byte of the 
received RAM word is done inside the GIME.
>>   * A1-A8 -> RAS0-RAS7
>>   * MMU bank bit 4 -> RAS8
>>   * A9-A12 -> CAS0-CAS3
>>   * bank bit 0-bank bit 3 -> CAS4-CAS7
>>   * bank bit 4 -> CAS8
>>
>> I find it odd that bank bit 4 is such an outlier, but that's what the
>> empirical data suggests.
>>
>> (RASX denotes the values on the DRAM address bus bits 0-8 during the RAS
>> falling edge, CASX denotes the same for falling edge of CAS)
Jim