[Coco] FPGA VS Software Emulators

[Walter Zambotti]

Where did all of you learn your FPGA programming skills?

You have really sparked my interest!

I've been coding and developing for nearly forty years and I'm wondering if this is something I could pick up .

Would the code (do you call it so?) for the FPGA projects be understandable to a regular coder like myself?

Or would I need to start on something much simpler and work up to something like these CoCo FPGA projects.

Walter

-----Original Message-----
From: Coco [mailto:coco-bounces at maltedmedia.com] On Behalf Of Gene Heskett
Sent: Wednesday, 26 July 2017 2:45 PM
To: coco at maltedmedia.com
Subject: Re: [Coco] FPGA VS Software Emulators

On Wednesday 26 July 2017 02:04:25 Mark McDougall wrote:

> On 26/07/2017 3:34 PM, Walter Zambotti wrote:
> > How much parallelism can occur in these FPGA devices?
>
> Every logic element in the device effectively runs "in parallel" on 
> each clock. It's the transition of your design's "states" and 
> propagation of your data through the logic that makes it a sequential 
> logic design, not the device itself. So basically, it's between you 
> and the silicon.
>
> > I suppose the down side is the maximum speed of the memory accesses 
> > will only be half as fast of what they could be!
>
> Again, this comes down more to replicating the original (Coco) design 
> and producing an 'emulation' that operates faithfully to the original.
> In theory you could implement instruction/data caches and burst 
> to/from (faster) memory for both CPU and video (given appropriate 
> bandwidth management) but then you're moving further away from a Coco 
> and start having issues with eg. video interrupt timings and you start 
> to break software like Sockmaster's demos etc.
>
> Regards,
>
FPGA's are a swiss army knife. To run my machinery, 3 of the 4 are now interfaced with one of 2 different Mesanet interface cards, based on 200k gate FPGA's.

The last one I've been playing with has an SPI interface, a serial 32 bit packet bidirectional interface to 5 GPIO pins on the raspberry pi 3b, that runs at 32 MHZ going one way, and 25 MHZ going the other. The FPGA translates that into 4 ABX encoder inputs, 4 PWM/PDM generators for pseudo analog outputs, and 4 stepper drivers. Thats 12 GPIO pins for encoders, 12 GPIO pins for the PWM/PDM generators, and 8 pins for the 4 step/dir stepper drivers. That leaves about 50 GPIO's I can use for other things, like coolant control, or an automated cutting tool changer.  All that in one 200k gate FPGA, each independent of the rest of the system. So doing a 6309 and the gime in the same FPGA really ought to be a piece of cake. And if you run out of gates, there are several 400k gate devices, at higher prices of course. This particular board costs me $62 for the last ones I bought.  Whats not to like?

All of these are indeed field programable, so I have the programmer software and quite a selection of 'bit' files I can write to them to make them do machines needing different resources to control them.

Cheers, Gene Heskett
--
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