[Coco] FPGA VS Software Emulators

[Mark McDougall]

On 26/07/2017 6:01 AM, tim franklinlabs.com wrote:

>     Yeah, agreed. I wrote a SDRAM controller running at 133MHz. using the
>     on board Phase lock Loop. No problem

Of course it depends on the silicon but very much so on the design 
itself. That comes down to factors such as number of gates, routing and 
fan-out as the propagation delays through the chip increase and keeping 
signals that change on the same clock edge in sync becomes more difficult.

There's also the issue of synchronising external inputs to clocks and 
internal clock-crossings which can introduce relatively large (compared 
to the clock) latencies in the design. Some of that requires careful 
design of the constraints or you'll reduce the clock rate even further!

I've worked with DDR controllers running upwards of 4-500MHz (vendor 
design) but they're carefully crafted in silicon that was designed with 
this functionality in mind. We've had the NIOS (soft-core RISC) running 
at around 150MHz but again, the NIOS has been crafted specifically for 
speed, including pipelining and caches and we had to use appropriate 
bridges to get it there.

Unfortunately the goals of pure speed and cycle-accuracy for a 6809 core 
are somewhat opposed. It's not impossible, but it would take a lot of 
work and be designed with those goals in mind at the out-set. Something 
that is probably not at the forefront of a hobbyist endeavour.

[As an side, I personally don't see the utility in running a Coco 
emulator at high speed. But others do...]

As for the discussion of FPGA's not being 'emulators' - I'll leave that 
contentious issue for another time. I've already chimed into what ended 
up being quite a heated debate over on AtariAge a few years back. The 
argument itself comes down to nit-picking the definition of 'emulation' 
and often a need to discard the belief that FPGA's are somehow magically 
accurate. Enough from me. ;)

Regards,

-- 
Mark McDougall
<http://retroports.blogspot.com.au>