[Coco] FPGA VS Software Emulators

[Dave Philipsen]

Is there a webpage or information site for the project?

Dave


On 7/25/2017 12:54 PM, Bill Nobel wrote:
> No problem Dave. I have the Coco on a chip version myself and worked closely with Roger on the Nitros-9 stuff.  Gary’s project is just as good as this and contains a lot of the same features Hardware wise.  Internally on the FPGA chip alone is where there are differences.
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> Bill Nobel
> b_nobel at hotmail.com<mailto:b_nobel at hotmail.com>
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> On Jul 25, 2017, at 11:50 AM, Dave Philipsen <dave at davebiz.com<mailto:dave at davebiz.com>> wrote:
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> Ah, thanks for the clarification.
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> On 7/25/2017 12:42 PM, Bill Nobel wrote:
> Close Dave, the DE0 version uses external SRAM chips @ 10ns.  The CocoFPGA does also, but use a much higher speed chip set for the SRAM.
>
> Bill Nobel
> b_nobel at hotmail.com<mailto:b_nobel at hotmail.com><mailto:b_nobel at hotmail.com>
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> On Jul 25, 2017, at 11:39 AM, Dave Philipsen <dave at davebiz.com<mailto:dave at davebiz.com><mailto:dave at davebiz.com>> wrote:
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> Actually I believe that the CoCo3FPGA uses SRAM @ 10ns access time. I'm not 100% sure on this but I believe the CoCo on a chip is based upon the DE0 Nano which does not have SRAM but uses SDRAM instead.
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> Dave
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> On 7/25/2017 8:50 AM, Bill Nobel wrote:
> Hi Walter good points to bring up.
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> The Coco on a chip project uses SRAM @ 10ns access time. The CocoFPGA uses a faster SRAM which is why the speed difference.  The reason software emulators can do a lot better speed is just that. Its a Software emulation, no speed limitations as it is a software clock that is changeable based on the CPU it’s being run on.  FPGA’s still have to communicate to real hardware which will pass a limitation to the speeds they run, depending on what is being interfaced. Each hardware device will have a different speed rating.  Both FPGA projects run on an internal clock of 50mhz which is then divided down to to a speed for each device connected (whether it’s internally programmed or physically attached).
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> There are many other factors that affect speeds as well, but in this case the FPGA is not really the limitation, it’s the hardware that attaches to it.
>
> Bill Nobel
> b_nobel at hotmail.com<mailto:b_nobel at hotmail.com><mailto:b_nobel at hotmail.com><mailto:b_nobel at hotmail.com>
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> On Jul 25, 2017, at 1:02 AM, Walter Zambotti <zambotti at iinet.net.au<mailto:zambotti at iinet.net.au><mailto:zambotti at iinet.net.au><mailto:zambotti at iinet.net.au>> wrote:
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> Before I start this is not a one is better than the other debate.
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> This is about better understanding each technology.
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> Ok so my initial thoughts regarding FPGA (as I really know nothing) were
> hardware simulation should
> provide an end product that is more efficient and faster than a general
> CPU/software emulator.
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> However this does not appear to be the case.
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> The CoCo on a chip project emulates an 8mhz CoCo.
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> The CoCoFPGA project a 25mhz CoCo.
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> And VCC on my i5 (3.3 ghz) a 133mhz CoCo.
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> What causes these differences in end speed?
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> Why are the two FPGA projects so different in speed?
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> Why are both FPGA solutions slower than a CPU/software solution?
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> Is it the particular FPGA hardware itself?
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> Would high end FPGAs provide a different result?
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> I've just download the FPGA for Dummies eBook from Altera so I'm starting my
> education process.
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> Walter
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