[Coco] Fwd: Re: FPGA VS Software Emulators

Dave Philipsen dave at davebiz.com
Tue Jul 25 03:59:14 EDT 2017


I wouldn't consider myself an expert on it but here's my explanation for 
it: The software emulators such as VCC are running on a customized Intel 
(or possibly AMD) processor that is highly optimized to run at a very 
high clock speed in the gigahertz range. An FPGA on the other hand, is 
more generalized in that you can 'wire it up' to do whatever you want it 
to do (within its limitations). It can't be optimized much since its 
designers do not know how it will be programmed by the end user.

In a customized CPU the designer can route all of the internal signals 
in such a way as to be the most efficient. The FPGA has a more limited 
control of this. And, I think you are right in assuming that there are 
more complex FPGAs out there that can run at higher clock speeds. My 
guess is that an FPGA exists that would yield a 133 MHz CoCo but at this 
stage in time would be prohibitively expensive.

I suppose you could draw a crude analogy in saying that a PC emulation 
of a CoCo is like a BASIC interpreter. Each BASIC command is interpreted 
and analyzed and the machine then carries out the desired action. An 
FPGA is more like machine language in that there is no "interpretation" 
involved. You are programming a machine to behave exactly as the thing 
you are synthesizing. An Intel CPU emulating a 6809 will always have to 
make a sacrifice of its resources to 'interpret' what the 6809 would do 
while an FPGA would not. I would suppose that, hypothetically, if an 
Intel CPU could be converted or re-designed internally to directly carry 
out 6809 opcodes then we'd have a 3.3 GHz CoCo on our hands. But we all 
know that will never happen because Intel would never be willing to 
spend the gazillions of dollars needed to pull off such a thing.

I'm also pretty sure that someone out there with a lot more knowledge 
than I on the subject could come up with some schemes for pipelining, 
out-of-order execution, speculative execution, branch prediction, 
hyper-threading, etc. for the 6809 which could be synthesized in FPGA 
and it would probably result in a much faster processor than what is 
currently available. Unfortunately I think the people with that kind of 
knowledge probably wouldn't waste their time focusing on the 6809.

So Intel CPUs will probably continue for some time to be out there much 
nearer to the cutting edge than what is possible with FPGAs but you 
never know what may be around the corner. After all, Intel bought 
Altera, right?

Another thing to keep in mind is that for a PC to emulate a CoCo it must 
boot it's own operating system first and it consumes a relatively large 
amount of power while an FPGA which synthesizes a CoCo runs on a tiny 
5-watt power supply and boots pretty much immediately like a real CoCo 
would.

Lastly, I'm not real familiar with the CoCo on a chip (8 MHz) but there 
are a lot of things that come into play. The CoCo3FPGA is a more mature 
project and so perhaps it has been optimized better. And perhaps there 
are limitations with the memory or other peripherals on the DE0 that 
make it more difficult to run at higher speeds.

I was just thinking of this: If you were to design a CoCo solely from 
74XX TTL chips (which is theoretically possible) how fast do you think 
it would run? You might be lucky if you could get 20-30 MHz out of it.

Generic stuff just runs slower than custom stuff.


Dave


On 7/25/2017 2:02 AM, Walter Zambotti wrote:
> Before I start this is not a one is better than the other debate.
>
>   
>
> This is about better understanding each technology.
>
>   
>
> Ok so my initial thoughts regarding FPGA (as I really know nothing) were
> hardware simulation should
> provide an end product that is more efficient and faster than a general
> CPU/software emulator.
>
>   
>
> However this does not appear to be the case.
>
>   
>
> The CoCo on a chip project emulates an 8mhz CoCo.
>
> The CoCoFPGA project a 25mhz CoCo.
>
> And VCC on my i5 (3.3 ghz) a 133mhz CoCo.
>
>   
>
> What causes these differences in end speed?
>
>   
>
> Why are the two FPGA projects so different in speed?
>
>   
>
> Why are both FPGA solutions slower than a CPU/software solution?
>
>   
>
> Is it the particular FPGA hardware itself?
>
>   
>
> Would high end FPGAs provide a different result?
>
>   
>
> I've just download the FPGA for Dummies eBook from Altera so I'm starting my
> education process.
>
>   
>
> Walter
>
>   
>
>   
>
>



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