beretta42 at gmail.com
Tue Sep 27 13:43:23 EDT 2016
Yesterday, I got Jim Card's working with Fuzix here's a demo:
On Sat, Sep 24, 2016 at 4:55 PM, RETRO Innovations <go4retro at go4retro.com>
> On 9/24/2016 3:11 PM, Brett Gordon wrote:
>> o For everyone's reference, to convert from 65/68XX signalling to
>>> Intel/ISA, here are the equations:
>>> + assign _iow = !(ce_nic & !r_w & e);
>>> + assign _ior = !(ce_nic & r_w & e);
>>> + gating with E is important on both read and write
>> Thanks for sharing that. I believe its important to our small community
>> that nuggets of helpful info are free and open. So from the little I
>> understand of hardware, it looks as if ISA busses have a separate read and
>> write lines, where the m6809 has one?
> Yes, Motorola logic (and 65XX, since the MOS guys all came from Moto after
> the 6800), uses CLK (E), !CE, and R/!W, while Intel uses CS (chip select),
> RD, and WR. Sometimes, CLK is not used, but if not, then CE is assumed ot
> be gated with E if needed.
>> All nice features. Not sure about a coco router, though, I'm guessing the
>> code for such would actually be easier than a full tcp/ip stack :)
> C'mon, you know you want to try it, if only to say you got it to work.
> Coco mailing list
> Coco at maltedmedia.com
More information about the Coco