[Coco] Glenside IDE + Multi-Pak + HDB-DOS

[Brett Gordon]

I personally wouldn't worry about backward compatibility with software.
HDB is easily changed.  Most of our software is open, and can be changed.
Esp. if you plan on flashable ROM.  If obeying the SCS makes the device
simpler then do it.

My $.02

brett
On Sep 11, 2016 5:48 PM, "Mark J. Blair" <nf6x at nf6x.net> wrote:

>
> > On Sep 11, 2016, at 14:24, Robert Gault <robert.gault at att.net> wrote:
> >
> > The issue with the Glenside controller probably is not caused by the MPI
> "reflecting" addresses at $FF7x. There looks to be some timing issue, maybe
> in the HDBDOS code. Boisy mentions READ problems not WRITE ones.
>
> Interesting! I don't understand the MPI in great detail yet, but I have
> been studying the Glenside IDE schematic today. It appears to me that it
> makes use of offsets $0..$8 from its base address (either $FF50 or $FF70),
> and will drive garbage on the D bus for reads at offsets $9..$F. Is the MPI
> slot select register at $FF7F readable by the CoCo? If so, I can see how
> the Glenside IDE would at least garble MPI slot select register reads if
> the Glenside card it jumpered for $FF7x. I'd like to understand the MPI a
> lot better, including any partial address decoding that might cause
> unexpected conflicts with other hardware.
>
> Maybe I need to study this possible timing issue more to figure out what
> is going on. The CF adapter I'm designing would be a new design using a
> CPLD for all of the logic. I want it to be usable in an MPI, so I would
> need to address any timing issues whether they lie in the hardware design
> or the HDB-DOS code.
>
> > While this is not exactly the same as I have a Ken-Ton controller rather
> than the Glenside IDE, with my MPI system the hard drives are addressed in
> the $FF7x range with my Disto SCII controller set to the alternate $FF5x
> range.
>
> It might be because my brain is addled by the cold I'm presently
> suffering, but I don't think I understand the point you're making there.
>
>
> I've been contemplating whether I should make a fully
> Glenside-IDE-compatible CF adapter vs. taking more liberty with the design.
> I gather that the Glenside IDE fully decodes the address bus rather than
> using the SCS signal so that it can coexist with a floppy controller on a Y
> cable. I'm not sure that it makes sense to expect my new widget to be used
> on a Y cable with a floppy controller, since I plan to include an EEPROM on
> my widget which would conflict with the ROM in a Y-cabled floppy
> controller. If I assumed that my widget would never be used on a Y cable,
> then I could use SCS for the CF card base address, and that might even let
> me use a smaller and cheaper CPLD since I would not need to decode A15..4.
> But that would also break compatibility with existing Glenside-aware
> software, which would at least need to be patched for a different base
> address at $FF4x.
>
>
> --
> Mark J. Blair, NF6X <nf6x at nf6x.net>
> http://www.nf6x.net/
>
>
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