[Coco] Utility of large MPI

[RETRO Innovations]

On 2/3/2016 5:38 PM, Dave Philipsen wrote:
> I know I'm kind of jumping in the middle of this conversation and I 
> haven't followed it that closely as it has progressed but I just 
> thought I'd interject a thought here for whatever it's worth.
>
> I'm sure, too, that OS9 could handle a large number of serial ports.  
> A couple of things that would lessen the load on the CPU would be a 
> way of consolidating multiple ports to one interrupt and a register 
> that would indicate which port(s) were causing the interrupt.  Also, a 
> buffered UART would probably help quite a bit. If instead of getting 
> an interrupt for every single character received the CPU could get an 
> interrupt when a buffer  reaches a predefined level, then the 
> interrupt routine could suck multiple characters from multiple UARTs 
> with just one interrupt.  This is the way some modern multi-port 
> serial cards work.
>
> Over the last few months I have been working on an FPGA project and 
> I've found that FPGAs lend themselves quite well to the task of serial 
> communications.  While I certainly don't consider myself to be an 
> expert with FPGAs I can tell you that even a small FPGA could handle 
> the task of running multiple UARTs and interfacing them to a CPU.  The 
> current design I'm working on has 9 serial ports of different flavors 
> (some xmt only, some RS232, some RS485/422, etc.).  Also, since I have 
> control of the design I am not constrained to a particular baud rate 
> generator or divider that most common UARTs have.  I can generate 
> practically any baud rate I want including non-standard ones.  One 
> could even design a sort of "DMA-like" interface or a memory-mapped 
> array such that much of the overhead of the serial communications 
> could happen in hardware and the CPU could simply suck the data out of 
> the array without even using interrupts.

I think there is a market for a 16c754-like quad uart:

http://www.ti.com/product/tl16c754c

That has a 6551 compatible register mapping (at least for the basic UART 
functions)

If you designed it (even just the Verilog), I would buy a license to use 
for sure.

Jim