[Coco] Help with some HiRes CoCo 3 MMU settings
Glen Hewlett
glen.hewlett at sympatico.ca
Wed Dec 7 17:08:01 EST 2016
Hi Robert,
I think William Astle, has figured out some of my problems are CoCo 1 & 2 Interrupts that are still enabled and running in the background. I guess you guys would have figured out that if I sent the entire code, but my program is actually quite big at this time. Although just for learning and testing I’ve now shrunk it down to a quick little setup and test code. Whenever I finish my program I will share it on the list, I just don’t want to go into any details of the actual program right now.
You said I don’t want the fast rate enabled for the Timer Clock source. Why not? Is that only used for sound and too many interrupts for a general program to use? Or am I way off? Another question from Sock Masters site I read:
FF91 (65425) Initialization Register 1 - INIT1
Bit 7 Unused
Bit 6 ? Memory type
1=256K, 0=64K chips
Bit 5 TINS Timer clock source
1=279.365 nsec, 0=63.695 usec
Bits 4-1 Unused
Bit 0 TR MMU task select
1=enable FFA8-FFAF MMU registers
0=enable FFA0-FFA7 MMU registers
The TINS bit selects the clock speed of the countdown timer. The 279 ns clock is useful for interrupt driven sound routines while the 63 us clock is used for a slower timer. The task bit is generally set to zero in DECB.
The task register select which set of MMU bank registers to assign to the CPU's 64K workspace.
What does the bit 6 the Memory type actually do? Should it always be set to zero?
This is my current test code, I still have to look into stopping any CoCo 1 &2 interrupts as per Will’s email. Maybe instead of me fighting all night with it you could show me the best way to stop all the IRQs except for the generic CoCo 3 IRQ? If it’s too much to ask that’s fine I’ll keep going…. I really appreciate the knowledge you guys are passing along.
Cheers,
Glen
*****************************************************
** Used Labels *
*****************************************************
TEXT_SCREEN_START EQU $0400
TEXT_SCREEN_END EQU $0600
IRQ_Jump_position EQU $FEF7 * Store $7E which is the JMP opcode
IRQ_Start_Address EQU $FEF8 * Store the address you want the IRQ to jumpt to at this address
IRQ_POINT EQU $FEF7 * $FEF7 is the usual CoCo3 SuperBasic IRQ value
PIA0_Byte_0_KeyRw_Joy EQU $FF00
PIA0_Byte_1_HSYNC EQU $FF01
PIA0_Byte_2 EQU $FF02
PIA0_Byte_3_VSYNC EQU $FF03
PIA1_Byte_0_IRQ EQU $FF20
PIA1_Byte_1_IRQ EQU $FF21
PIA1_Byte_2 EQU $FF22
PIA1_Byte_3_IRQ_Ct_Snd EQU $FF23
INIT0_Register0 EQU $FF90
INIT1_Register1 EQU $FF91
IRQENR EQU $FF92
FIRQENR EQU $FF93
Timer_register_MSB EQU $FF94
Timer_register_LSB EQU $FF95
Video_Mode_Register EQU $FF98
Vid_Res_Reg EQU $FF99
Border_Register EQU $FF9A
VidStart EQU $FF9D *
Hor_Offset_Reg EQU $FF9F
MMU_Reg_0 EQU $FFA0
MMU_Reg_1 EQU $FFA1
MMU_Reg_2 EQU $FFA2
MMU_Reg_3 EQU $FFA3
MMU_Reg_4 EQU $FFA4
*Screen Colour Settings
Palette_Start EQU $FFB0
Palette_0 EQU $FFB0
Palette_1 EQU $FFB1
Palette_2 EQU $FFB2
Palette_3 EQU $FFB3
Palette_4 EQU $FFB4
Palette_5 EQU $FFB5
Palette_6 EQU $FFB6
Palette_7 EQU $FFB7
Palette_8 EQU $FFB8
Palette_9 EQU $FFB9
Palette_10 EQU $FFBA
Palette_11 EQU $FFBB
Palette_12 EQU $FFBC
Palette_13 EQU $FFBD
Palette_14 EQU $FFBE
Palette_15 EQU $FFBF
Regular_Speed EQU $FFD8
High_Speed_Mode EQU $FFD9
ROM_Mode_Enable EQU $FFDE
RAM_Mode_Enable EQU $FFDF
Screen_Location EQU $0000
Border_Colour EQU $00 * 00 - Black
*Stack_Space RMB $100 * Example for making some stack space
***********************************************************
ORG $4000 * Start in low memory after Disk Basic usage
Stack_Space RMB $100 * Leave room for a our stack
Stack_Pointer EQU START-1
START LDS #$7000 * Start of program
PSHS X,Y,D,U * Save the Registers
***********************************************************
System_EnableGraphics
ORCC #$50 * disable interrupts
LDA #%01001100 * Coco3, MMU on, IRQ disabled, FIRQ Disabled, DRAM constant, standard SCS 16K internal 16K external ROM
STA INIT0_Register0
LDA #%00000000
STA INIT1_Register1 * Select MMU Task Register 0 which is $FFA0 - $FFA7
LDA #%10000000 * graphics mode, Colour output, 60 hz, max vertical res
STA Video_Mode_Register
***********************************************************
* Set Hires Screen Resolution and the number of Colours
*
* Bit Pattern Rows Displayed
* x00xxxxx 192
* x01xxxxx 200
* x10xxxxx *zero/infinite lines on screen (undefined)
* x11xxxxx 225
* Bit Pattern Bytes/Row (Graphics)
* xxx000xx 16
* xxx001xx 20
* xxx010xx 32
* xxx011xx 40
* xxx100xx 64
* xxx101xx 80 320 4 Colours 01
* xxx110xx 128
* xxx111xx 160
* Bit Pattern Colours Pixels/Byte
* xxxxxx00 2 8
* xxxxxx01 4 4
* xxxxxxl0 16 2
* xxxxxx11 Undefined Undefined
***********************************************************
* Most Common used settings (Uncomment the one you want to use)
* LDA #%00001000 * 256 x 192 x 2 Colours requires 6,144 bytes = $1800 RAM
* LDA #%00101000 * 256 x 200 x 2 Colours requires 6,400 bytes = $1900 RAM
LDA #%01101000 * 256 x 225 x 2 Colours requires 7,200 bytes = $1C20 RAM
* LDA #%00010001 * 256 x 192 x 4 Colours requires 12,288 bytes = $3000 RAM
* LDA #%00110001 * 256 x 200 x 4 Colours requires 12,800 bytes = $3200 RAM
* LDA #%01110001 * 256 x 225 x 4 Colours requires 14,400 bytes = $3840 RAM
* LDA #%00011010 * 256 x 192 x 16 Colours requires 24,576 bytes = $6000 RAM
* LDA #%00111010 * 256 x 200 x 16 Colours requires 25,600 bytes = $6400 RAM
* LDA #%01111010 * 256 x 225 x 16 Colours requires 28,800 bytes = $7080 RAM
* LDA #%00001100 * 320 x 192 x 2 Colours requires 7,680 bytes = $1E00 RAM
* LDA #%00101100 * 320 x 200 x 2 Colours requires 8,000 bytes = $1F40 RAM
* LDA #%01101100 * 320 x 225 x 2 Colours requires 10,240 bytes = $2800 RAM
* LDA #%00010101 * 320 x 192 x 4 Colours requires 15,360 bytes = $3C00 RAM
* LDA #%00110101 * 320 x 200 x 4 Colours requires 16,000 bytes = $3E80 RAM
* LDA #%01110101 * 320 x 225 x 4 Colours requires 18,000 bytes = $4650 RAM
* LDA #%00011110 * 320 x 192 x 16 Colours requires 30,720 bytes = $7800 RAM
* LDA #%00111110 * 320 x 200 x 16 Colours requires 32,00 bytes = $7D00 RAM
* LDA #%01111110 * 320 x 225 x 16 Colours requires 36,000 bytes = $8CA0 RAM
* LDA #%00010100 * 640 x 192 x 2 Colours requires 15,360 bytes = $3C00 RAM
* LDA #%00110100 * 640 x 200 x 2 Colours requires 16,000 bytes = $3E80 RAM
* LDA #%01110100 * 640 x 225 x 2 Colours requires 18,000 bytes = $4650 RAM
* LDA #%00011101 * 640 x 192 x 4 Colours requires 30,720 bytes = $7800 RAM
* LDA #%00111101 * 640 x 200 x 4 Colours requires 32,000 bytes = $7D00 RAM
* LDA #%01111101 * 640 x 225 x 4 Colours requires 36,000 bytes = $8CA0 RAM
STA Vid_Res_Reg
***********************************************************
* Border settings
LDA #Border_Colour *
STA Border_Register *
LDD #$C000 * Point video screen veiwer at $60000 (Hi-Res page start)
STD VidStart * which is at $60000 / 8 = $C000
* Load GIME pages $30 & $31 into CPU RAM $0000-$1FFF & $2000-$4000
LDA #$30 * Start at Hi-Res page #1 (default page)
STA $FFA0
LDA #$31
STA $FFA1
* Need to disable the Coco 1 & 2 Interrupts here
LDA #$00 * Vertical border interrupt Enabled
STA IRQENR * Timer interrupt Enabled
LDA #$00 *
STA FIRQENR * FIRQ are all disabled
CLR Timer_register_LSB * Set the Timer to 0
CLR Timer_register_MSB * The Timer Interrupt will activate whenever the timer counts down to zero
LDA #$7E * Setup IRQ jump location, Opcode for JMP instruction
STA IRQ_Jump_position * Store it at FEF7 which is the address the the IRQ will jump to
LDX #My_IRQ * the actual address that will run when an IRQ hits (C2F9)
STX IRQ_Start_Address * Store the program start at the IRQ Address (FEF8)
ANDCC #$EF * Enable the IRQ
* Show some stuff on the screen (for a test)
LDX #Screen_Location * screen start
CLRA * Colour 00
horiz LDY #1920 * bytes per 1/16 of screen
l1 STA ,X+
LEAY -1,Y * decrement counter
BNE l1
ADDA #$11 * increment both pixel Colours
CMPX #Screen_Location+$1000 * end of graphics
BLT horiz
BRA Inkey * wait for key press then retore memory back to normal and exit
My_IRQ
ORCC #$10 * Disable the IRQ Interrupt
INC $100 ; See on screen if IRQ is doing something
LDA IRQENR * IRQENR - Interrupt request enable register
BITA #$20 * Test Timer interrupt (TMR)
BNE TestIRQ
ANDCC #$EF * Restore Condition Codes to re-enable IRQ Interrupt
RTI
TestIRQ
LDD #$0FFF *C336: 86 95 Set Timer to Max of 4095
STD Timer_register_MSB *C33D: B7 FF 94 Store Timer in FF94 Timer register
ANDCC #$EF * Restore Condition Codes to re-enable IRQ Interrupt
RTI
***********************************************************
* Keyboard Reading is done by sending a masked byte based on the on the top row below on $FF02 and tested
* against the bits on the left marked Row. Match up the grid.
* For example to test if the letter 'T' is being pressed
* you would store the byte %11101111 (bit 4 from the data row) in $FF02
* and load the byte from $FF00 and test it against %00000100 (bit 2 from the Row) if it's equal then the key was pressed
*
*Row Data
*bits 7 6 5 4 3 2 1 0
*0 G F E D C B A @
*1 O N M L K J I H
*2 W V U T S R Q P
*3 SP RGT LFT DN UP Z Y X
*4 ' & % $ # " ! 0
*4 7 6 5 4 3 2 1
*5 ? > = < + * ) (
*5 / . _ , ; : 9 8
*6 shifts BRK CLR ENT
***********************************************************
Inkey LDX #$FF00 *
LDB #$00 *
Z5084 LDA #%01111111 * bit 7
STA $02,X *
LDA ,X *
BITA #%00001000 * and bit 3 = spacebar
BNE Z5084 *
Z509A
LDX #Screen_Location * screen start
LDA #$FF * Colour 1
l1b STA ,x+
cmpx #Screen_Location+$1000 * end of graphics
BLT l1b
LDX #$FF00 *
LDB #$00 *
l10 LDA #%11110111 * bit 3
STA $02,X *
LDA ,X *
BITA #%00000001 * and bit 0 = 'C'
BNE l10 *
l11
Final END START * set exec address
* end of file -
> On Dec 7, 2016, at 4:31 PM, Robert Gault <robert.gault at att.net> wrote:
>
> Glen Hewlett wrote:
>> Hi Robert,
>>
>> Thanks for looking at the code, I’ve been trying so many things to figure out why I’m having my problem that I’ve changed code without updating the comments many times... I should have gone back and looked through my code and comments a little better last night before posting. I was just at that point where I was getting really frustrated and really tired. I was going to wait before posting but I figured it would mean at least another day before getting any help.
>>
>> I actually noticed the INIT0_Register0 entry today myself and changed it to the proper INIT1_Register1 so my code will use MMU Bank 0 (%00100000 stored at $FF91).
>>
>> <snip>
>
> Glen,
> You are still sending the wrong value to $FF91. You do NOT! want to set the timer select TINS to the fast rate.
> By the way, the service manual claims 1 = 70nsec but I've timed it and it is related to the color burst not the master clock; so more like 279nsec.
>
> I'll be testing the latest code snippets but it would be much easier to proofread your code if you sent me the full source.
>
> Robert
>
>
>
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