[Coco] XPander-Coco lives!

[RETRO Innovations]

On 8/31/2015 7:58 PM, Mark Marlette wrote:
> Jim
>
>
> The only thing that I can think of is SLENB*. It is used to get the ghosting of certain floppy disk controllers off the bus. This is for ROM access only. The IDE hardware is IOmapped at $FF50-$FF59 by default.
Since people use this list archive for reference, I thought I'd update 
this email.

At the CocoFEST, Mark and I discussed the SLENB line, and the reasons 
the SuperIDE uses it (as he notes above, it's to deal with mirrored 
registers on the FDC), and I did a bit of research at the show on the 
SueprIDE I have.

The SuperIDE asserts SLENB line for the range $ff50-5F (assuming the 
base address of the SIDE is $ff50), which is what threw me on testing (I 
was hoping to put my device at $ff5c,since SIDE does not use those 
locations).

Given the number of units in the marketplace, it seems more prudent for 
me to select another base address.

The other issue I found is not SuperIDE specific, but is relevant to all 
Glenside IDE compatible units.  While I applaud the original Glenside 
IDE controller designer's efforts and design in general, I guess I will 
go on record disagreeing with his decision to fully decode the $ff5x 
address range for the IDE interface.  In effect, this greatly diminishes 
the value of the MPI for IO peripherals, as it overrides the behavior of 
the SCS line (which is asserted for any $ff40-5f address, but only for 
the slot selected on the MPI) on the MPI, effectively forcing the IDE 
controller onto the Coco Bus any time $ff50-$5f is asserted.

It's a shame, really, because this behavior essentially "halves" the IO 
address space under MPI control (from $40-5f to $40-4f)

FWIW, show testing went well, and so I hope all of the bugs are squashed 
and I can put the unit into production.  I know there was lots of 
interest at the show.

Jim