[Coco] Assembly help

[tim franklinlabs.com]

   I'm not quite sure what you're doing here but one section of your code
   looks odd. You compare X to $e000 which sets the condition code
   register then you don't do anything with the comparison. The next
   command is a JSR SIGSEG. Shouldn't it be something like "BEQ" or BNE or
   BLO or some other logic that acts on the compare? It just looks odd and
   may not be doing what you expect it to do.

     On October 16, 2015 at 9:01 PM Chad H <chadbh74 at hotmail.com> wrote:
     I have modified the original 25 byte assembly loader for .BIN files
     to read
     8K from &HC000 to &HDFFF, access &HFF40 to trigger a SCS line
     (Picked up by
     a microcontroller that will switch to the next 8K bank section, then
     read in
     the next bank. Each bank beginning with the second in the sequence,
     will
     have a byte ID at &HC000, incrementing to identify each bank. If the
     loader
     doesn't recognize the correct bank, it will access the &HFF40 again.
     Unfortunately, my revised 512K pcb's are unusable due to footprint
     size
     problem with the ULN2803 transistor array so I had to correct and
     order
     another batch.
     In the mean time, I have no way to test this modified code. The
     SIGSEG,
     SENDSIG and CHKSW sections are all new. Everything else was from the
     original. This doubles the size of the code to 52 bytes, though that
     won't
     be much of a issue since .BIN's can be any size if this works. I'm
     hoping
     someone can look it over for me, I was kinda throwing darts at it
     with the
     use of the CMPA and BNE stuff. I've looked at several assembly
     language
     references, included some existing source listings and can't verify
     I'm
     using these correctly. Basically I'm using SEGID as a incremented
     variable, which gets compared to register A, which is loaded from
     49152
     (&HC000). Any help from you assembly gurus would be greatly
     appreciated!
     Thanks.
     *.BIN single/multisegment bootloader for ROM Pak
     org 49152 CoCo and compatibles
     map in ROM Paks here
     SEGID equ 0
     * LOADER
     BININ LDX #BINLOD INIT XFER DATA ADDRESS OFFSET
     CLRB RESET AND CLEAR
     SEGMENT COUNTER
     CHKBLK LDA ,X+ GET BLOCK TYPE BYTE (00 = PREAMBLE,
     255=POSTAMBLE)
     BNE ENDBIN IF <>0 THEN MUST BE END OF .BIN DATA
     (POSTAMBLE)
     LDY ,X++ GET BLOCK LENGTH(Y)
     LDU ,X++ GET BLOCK START ADDRESS(U)
     XFER LDA ,X+ GET SOURCE BYTE(A) FROM X
     STA ,U+ PUT BYTE(A) AT U
     CMPX $E000 REACHED END OF 8K SEGMENT?
     JSR SIGSEG GO SIGNAL FOR THE NEXT SEGMENT.
     LEAY -1,Y MOVED BLOCK?
     BNE XFER NO
     BRA CHKBLK CHECK NEXT BLOCK
     SIGSEG INC SEGID INCREMENT SEGMENT COUNTER
     SENDSIG LDX #$FF40 SET ADDRESS FOR
     TRIGGER
     LDA ,X TRIGGER SCS LINE TO
     MICROCONTROLLER
     CHKSW LDX 49152 SET ADDRESS FOR SEGMENT
     IDENTIFICATION BYTE LOCATION
     LDA ,X
     CMPA #SEGID COMPARE WITH EXPECTED SEGMENT
     IDENTIFIER
     BNE SENDSIG SEND SIGNAL
     AGAIN IF NOT YET EXPECTED SEGMENT
     LDX #BINLOD RESET
     POINTER TO BEGINNING OF NEXT SEGMENT
     RTS RETURN TO
     TRANSFER LOOP
     ENDBIN JMP [2,X] SKIP BLOCK LENGTH (0000) AND JUMP TO
     EXECUTION ADDRESS
     BINLOD FCB 255
     - Chad H
     http://sites.google.com/site/cbhlab101/
     --
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